From 167cb9663adc8c7c61807e503f66e85f955e7d5f Mon Sep 17 00:00:00 2001 From: Eduardo Lima Mitev Date: Tue, 16 Jun 2015 21:24:21 +0200 Subject: [PATCH] i965/nir/vec4: Implement load_input intrinsic The source register is fetched from the nir_inputs map built during nir_setup_inputs stage. Reviewed-by: Jason Ekstrand --- src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp index 763c69a9521..5bf1dbb7881 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp @@ -446,13 +446,31 @@ vec4_visitor::nir_emit_load_const(nir_load_const_instr *instr) void vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr) { + dst_reg dest; + src_reg src; + + bool has_indirect = false; + switch (instr->intrinsic) { case nir_intrinsic_load_input_indirect: + has_indirect = true; /* fallthrough */ - case nir_intrinsic_load_input: - /* @TODO: Not yet implemented */ + case nir_intrinsic_load_input: { + int offset = instr->const_index[0]; + src = nir_inputs[offset]; + + if (has_indirect) { + dest.reladdr = new(mem_ctx) src_reg(get_nir_src(instr->src[0], + BRW_REGISTER_TYPE_D, + 1)); + } + dest = get_nir_dest(instr->dest, src.type); + dest.writemask = brw_writemask_for_size(instr->num_components); + + emit(MOV(dest, src)); break; + } case nir_intrinsic_store_output_indirect: /* fallthrough */ -- 2.30.2