From 16c9cc2d179a5e791b14ec446a130dfe9a1d2803 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 2 Mar 2021 16:32:20 +0000 Subject: [PATCH] comment out changing SPR 720 because 720 is not supported by the MMU pipe --- src/soc/fu/mmu/test/test_issuer_mmu_rom.py | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/soc/fu/mmu/test/test_issuer_mmu_rom.py b/src/soc/fu/mmu/test/test_issuer_mmu_rom.py index 9f5e786d..2552b14b 100644 --- a/src/soc/fu/mmu/test/test_issuer_mmu_rom.py +++ b/src/soc/fu/mmu/test/test_issuer_mmu_rom.py @@ -34,11 +34,13 @@ default_mem = { 0x10000: # PARTITION_TABLE_2 class MMUTestCase(TestAccumulatorBase): # MMU on microwatt handles MTSPR, MFSPR, DCBZ and TLBIE. # libre-soc has own SPR unit + # libre-soc MMU supports MTSPR and MFSPR but **ONLY** for the subset + # of SPRs it actually does. # other instructions here -> must be load/store def case_mmu_ldst(self): lst = [ - "mtspr 720, 1", + #"mtspr 720, 1", # XXX do not execute unsupported instructions "lhz 3, 0(1)" # load some data ] -- 2.30.2