From 16cc362f0ba9fb240f3d47f06e74ac215c4d6c27 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 16 May 2008 11:46:26 -0700 Subject: [PATCH] r5xx: Fix SCS. Output instructions need to be marked OUT so they can write to the fifo. Also, negation doesn't work with SWZ yet. --- src/mesa/drivers/dri/r300/r500_fragprog.c | 32 +++++++++++++++-------- 1 file changed, 21 insertions(+), 11 deletions(-) diff --git a/src/mesa/drivers/dri/r300/r500_fragprog.c b/src/mesa/drivers/dri/r300/r500_fragprog.c index f8334f4dc6f..01f6010544a 100644 --- a/src/mesa/drivers/dri/r300/r500_fragprog.c +++ b/src/mesa/drivers/dri/r300/r500_fragprog.c @@ -652,14 +652,18 @@ static GLboolean parse_program(struct r500_fragment_program *fp) fp->inst[counter].inst5 = R500_ALU_RGBA_OP_SOP | R500_ALU_RGBA_ADDRD(dest); break; -#if 0 case OPCODE_SCS: + /* TODO: Make this elegant! */ /* Do a cosine, then a sine, masking out the channels we want to protect. */ src[0] = make_src(fp, fpi->SrcReg[0]); /* Cosine only goes in R (x) channel. */ - temp_pixel_mask = 0x1 << 11; - fp->inst[counter].inst0 = R500_INST_TYPE_ALU - | R500_INST_TEX_SEM_WAIT | temp_pixel_mask; + if (fpi->DstReg.File == PROGRAM_OUTPUT) { + fp->inst[counter].inst0 = R500_INST_TYPE_OUT + | R500_INST_TEX_SEM_WAIT | 0x1 << 14; + } else { + fp->inst[counter].inst0 = R500_INST_TYPE_ALU + | R500_INST_TEX_SEM_WAIT | 0x1 << 11; + } fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0]); fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0]); fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0 @@ -671,8 +675,11 @@ static GLboolean parse_program(struct r500_fragment_program *fp) | R500_ALU_RGBA_ADDRD(dest); counter++; /* Sine only goes in G (y) channel. */ - temp_pixel_mask = 0x2 << 11; - fp->inst[counter].inst0 = R500_INST_TYPE_ALU | temp_pixel_mask; + if (fpi->DstReg.File == PROGRAM_OUTPUT) { + fp->inst[counter].inst0 = R500_INST_TYPE_OUT | 0x2 << 14; + } else { + fp->inst[counter].inst0 = R500_INST_TYPE_ALU | 0x2 << 11; + } fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0]); fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0]); fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0 @@ -684,8 +691,11 @@ static GLboolean parse_program(struct r500_fragment_program *fp) | R500_ALU_RGBA_ADDRD(dest); counter++; /* Put 0 into B,A (z,w) channels. */ - temp_pixel_mask = 0xC << 11; - fp->inst[counter].inst0 = R500_INST_TYPE_ALU | temp_pixel_mask; + if (fpi->DstReg.File == PROGRAM_OUTPUT) { + fp->inst[counter].inst0 = R500_INST_TYPE_OUT | 0xC << 14; + } else { + fp->inst[counter].inst0 = R500_INST_TYPE_ALU | 0xC << 11; + } fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0]); fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0]); fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0 @@ -694,14 +704,13 @@ static GLboolean parse_program(struct r500_fragment_program *fp) | MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_ZERO); fp->inst[counter].inst4 = R500_ALPHA_OP_CMP | R500_ALPHA_ADDRD(dest) - | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(R500_SWIZ_ZERO) - | R500_ALPHA_SEL_B_SRC0 | MAKE_SWIZ_ALPHA_B(R500_SWIZ_ZERO); + | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(R500_SWIZZLE_ZERO) + | R500_ALPHA_SEL_B_SRC0 | MAKE_SWIZ_ALPHA_B(R500_SWIZZLE_ZERO); fp->inst[counter].inst5 = R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_ADDRD(dest) | MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO) | MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO); break; -#endif case OPCODE_SIN: src[0] = make_src(fp, fpi->SrcReg[0]); fp->inst[counter].inst0 = R500_INST_TYPE_ALU @@ -742,6 +751,7 @@ static GLboolean parse_program(struct r500_fragment_program *fp) | R500_ALU_RGBA_ALPHA_MOD_C_NEG; break; case OPCODE_SWZ: + /* TODO: Negation masks! */ emit_mov(fp, counter, fpi->SrcReg[0], dest); fp->inst[counter].inst0 |= pixel_mask; break; -- 2.30.2