From 1728e7427924b4555002f8d03736742aa6d22ebc Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Thu, 6 May 2021 18:06:47 +0100 Subject: [PATCH] pass SVP64 ReMap field through to core and then on to FU decoders --- src/soc/simple/core.py | 7 ++++++- src/soc/simple/issuer.py | 1 + 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/src/soc/simple/core.py b/src/soc/simple/core.py index 18d62eba..0db5dfa5 100644 --- a/src/soc/simple/core.py +++ b/src/soc/simple/core.py @@ -25,6 +25,7 @@ from nmigen.cli import rtlil from openpower.decoder.power_decoder2 import PowerDecodeSubset from openpower.decoder.power_regspec_map import regspec_decode_read from openpower.decoder.power_regspec_map import regspec_decode_write +from openpower.sv.svp64 import SVP64Rec from nmutil.picker import PriorityPicker from nmutil.util import treereduce @@ -104,10 +105,12 @@ class NonProductionCore(Elaboratable): # SVP64 RA_OR_ZERO needs to know if the relevant EXTRA2/3 field is zero self.sv_a_nz = Signal() - # state and raw instruction + # state and raw instruction (and SVP64 ReMap fields) self.state = CoreState("core") self.raw_insn_i = Signal(32) # raw instruction self.bigendian_i = Signal() # bigendian - TODO, set by MSR.BE + if self.svp64_en: + self.sv_rm = SVP64Rec(name="core_svp64_rm") # SVP64 RM field # issue/valid/busy signalling self.ivalid_i = Signal(reset_less=True) # instruction is valid @@ -160,6 +163,8 @@ class NonProductionCore(Elaboratable): comb += v.dec.bigendian.eq(self.bigendian_i) # sigh due to SVP64 RA_OR_ZERO detection connect these too comb += v.sv_a_nz.eq(self.sv_a_nz) + if self.svp64_en and k != self.trapunit: + comb += v.sv_rm.eq(self.sv_rm) # pass through SVP64 ReMap # ssh, cheat: trap uses the main decoder because of the rewriting self.des[self.trapunit] = self.e.do diff --git a/src/soc/simple/issuer.py b/src/soc/simple/issuer.py index 732d2bd9..21e18528 100644 --- a/src/soc/simple/issuer.py +++ b/src/soc/simple/issuer.py @@ -731,6 +731,7 @@ class TestIssuerInternal(Elaboratable): sync += core.state.eq(cur_state) sync += core.raw_insn_i.eq(dec_opcode_i) sync += core.bigendian_i.eq(self.core_bigendian_i) + sync += core.sv_rm.eq(pdecode2.sv_rm) # set RA_OR_ZERO detection in satellite decoders sync += core.sv_a_nz.eq(pdecode2.sv_a_nz) m.next = "INSN_EXECUTE" # move to "execute" -- 2.30.2