From 176b84c9670de6a0c11dfd73701f97b23f05004d Mon Sep 17 00:00:00 2001 From: Shriya Sharma Date: Fri, 27 Oct 2023 11:46:18 +0100 Subject: [PATCH] added english language description for lhbrsx instruction --- openpower/isa/fixedloadshift.mdwn | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/openpower/isa/fixedloadshift.mdwn b/openpower/isa/fixedloadshift.mdwn index 4423123a..1935e59f 100644 --- a/openpower/isa/fixedloadshift.mdwn +++ b/openpower/isa/fixedloadshift.mdwn @@ -356,11 +356,13 @@ Description: Let the effective address (EA) be the sum of the contents of register RB shifted by (SH+1), and (RA|0). - The doubleword in storage addressed by EA is loaded into RT. - - EA is placed into register RA. - - If RA=0 or RA=RT, the instruction form is invalid. + Bits 0:7 of the word in storage addressed + by EA are loaded into RT[56:63]. Bits 8:15 of the word in + storage addressed by EA are loaded into RT[48:55]. Bits + 16:23 of the word in storage addressed by EA are + loaded into RT[40:47]. Bits 24:31 of the word in storage + addressed by EA are loaded into RT 32:39. + RT[0:31] are set to 0. Special Registers Altered: -- 2.30.2