From 1781d26faa6bf13950b95be97b6510e8f13290d6 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Tue, 24 Apr 2012 23:10:46 +0200 Subject: [PATCH] gallium/docs: document the new vertex fetch CAPs --- src/gallium/docs/source/screen.rst | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/src/gallium/docs/source/screen.rst b/src/gallium/docs/source/screen.rst index 751eda3284a..05f7e8fc539 100644 --- a/src/gallium/docs/source/screen.rst +++ b/src/gallium/docs/source/screen.rst @@ -98,6 +98,18 @@ The integer capabilities: equivalent to a specific GLSL version. E.g. for GLSL 1.3, report 130. * ``PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION``: Whether quads adhere to the flatshade_first setting in ``pipe_rasterizer_state``. +* ``PIPE_CAP_USER_VERTEX_BUFFERS``: Whether the driver supports user vertex + buffers. If not, the state tracker must upload all data which is not in hw + resources. +* ``PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY``: This CAP describes a hw + limitation. If true, pipe_vertex_buffer::buffer_offset must always be aligned + to 4. If false, there are no restrictions on the offset. +* ``PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY``: This CAP describes a hw + limitation. If true, pipe_vertex_buffer::stride must always be aligned to 4. + If false, there are no restrictions on the stride. +* ``PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY``: This CAP describes + a hw limitation. If true, pipe_vertex_element::src_offset must always be + aligned to 4. If false, there are no restrictions on src_offset. -- 2.30.2