From 1900707e56ae8c913f1d16426065e128b1abbb14 Mon Sep 17 00:00:00 2001 From: zhengnannan Date: Tue, 10 Nov 2020 11:43:36 +0000 Subject: [PATCH] AArch64: Add FLAG for tbl/tbx intrinsics [PR94442] 2020-11-10 Zhiheng Xie Nannan Zheng gcc/ChangeLog: * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG for tbl/tbx intrinsics. --- gcc/config/aarch64/aarch64-simd-builtins.def | 24 ++++++++++---------- 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def index 09f275cd4fc..cb05aad77fb 100644 --- a/gcc/config/aarch64/aarch64-simd-builtins.def +++ b/gcc/config/aarch64/aarch64-simd-builtins.def @@ -545,28 +545,28 @@ VAR1 (BINOPP, crypto_pmull, 0, NONE, v2di) /* Implemented by aarch64_tbl3. */ - VAR1 (BINOP, tbl3, 0, ALL, v8qi) - VAR1 (BINOP, tbl3, 0, ALL, v16qi) + VAR1 (BINOP, tbl3, 0, NONE, v8qi) + VAR1 (BINOP, tbl3, 0, NONE, v16qi) /* Implemented by aarch64_qtbl3. */ - VAR1 (BINOP, qtbl3, 0, ALL, v8qi) - VAR1 (BINOP, qtbl3, 0, ALL, v16qi) + VAR1 (BINOP, qtbl3, 0, NONE, v8qi) + VAR1 (BINOP, qtbl3, 0, NONE, v16qi) /* Implemented by aarch64_qtbl4. */ - VAR1 (BINOP, qtbl4, 0, ALL, v8qi) - VAR1 (BINOP, qtbl4, 0, ALL, v16qi) + VAR1 (BINOP, qtbl4, 0, NONE, v8qi) + VAR1 (BINOP, qtbl4, 0, NONE, v16qi) /* Implemented by aarch64_tbx4. */ - VAR1 (TERNOP, tbx4, 0, ALL, v8qi) - VAR1 (TERNOP, tbx4, 0, ALL, v16qi) + VAR1 (TERNOP, tbx4, 0, NONE, v8qi) + VAR1 (TERNOP, tbx4, 0, NONE, v16qi) /* Implemented by aarch64_qtbx3. */ - VAR1 (TERNOP, qtbx3, 0, ALL, v8qi) - VAR1 (TERNOP, qtbx3, 0, ALL, v16qi) + VAR1 (TERNOP, qtbx3, 0, NONE, v8qi) + VAR1 (TERNOP, qtbx3, 0, NONE, v16qi) /* Implemented by aarch64_qtbx4. */ - VAR1 (TERNOP, qtbx4, 0, ALL, v8qi) - VAR1 (TERNOP, qtbx4, 0, ALL, v16qi) + VAR1 (TERNOP, qtbx4, 0, NONE, v8qi) + VAR1 (TERNOP, qtbx4, 0, NONE, v16qi) /* Builtins for ARMv8.1-A Adv.SIMD instructions. */ -- 2.30.2