From 1906abcde04c7f9af8186ac1a8a726a9ea80936f Mon Sep 17 00:00:00 2001 From: Miguel Serrano Date: Tue, 16 Aug 2005 15:44:57 -0400 Subject: [PATCH] Uart fix. dev/uart8250.cc: Fixed implementation of "transmit interrupt clear". --HG-- extra : convert_revision : cb69d61413ea799d5d3825fe2f0891dd72995561 --- dev/uart8250.cc | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/dev/uart8250.cc b/dev/uart8250.cc index bbde14769..2ad020462 100644 --- a/dev/uart8250.cc +++ b/dev/uart8250.cc @@ -147,13 +147,15 @@ Uart8250::read(MemReqPtr &req, uint8_t *data) case 0x2: // Intr Identification Register (IIR) DPRINTF(Uart, "IIR Read, status = %#x\n", (uint32_t)status); - //Tx interrupts are cleared on IIR reads - status &= ~TX_INT; - - if (status & RX_INT) + if (status & RX_INT) /* Rx data interrupt has a higher priority */ *(uint8_t*)data = IIR_RXID; + else if (status & TX_INT) + *(uint8_t*)data = IIR_TXID; else *(uint8_t*)data = IIR_NOPEND; + + //Tx interrupts are cleared on IIR reads + status &= ~TX_INT; break; case 0x3: // Line Control Register (LCR) *(uint8_t*)data = LCR; -- 2.30.2