From 190ff3576f9997007cfbd6ad41e858ec8b0acf28 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Thu, 18 Jun 2020 10:52:06 +0100 Subject: [PATCH] whoops generate core ilang not TestIssuer --- src/soc/simple/core.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/soc/simple/core.py b/src/soc/simple/core.py index 837e1d06..e52aac64 100644 --- a/src/soc/simple/core.py +++ b/src/soc/simple/core.py @@ -310,7 +310,7 @@ class NonProductionCore(Elaboratable): if __name__ == '__main__': - dut = TestIssuer() + dut = NonProductionCore() vl = rtlil.convert(dut, ports=dut.ports()) - with open("test_issuer.il", "w") as f: + with open("test_core.il", "w") as f: f.write(vl) -- 2.30.2