From 1945105b95e830b37cc58813532fae782c389190 Mon Sep 17 00:00:00 2001
From: Dmitry Selyutin <ghostmansd@gmail.com>
Date: Tue, 15 Nov 2022 18:49:23 +0300
Subject: [PATCH] power_insn: support predicates masks

---
 src/openpower/decoder/power_insn.py | 48 +++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/src/openpower/decoder/power_insn.py b/src/openpower/decoder/power_insn.py
index d5b34875..f2253627 100644
--- a/src/openpower/decoder/power_insn.py
+++ b/src/openpower/decoder/power_insn.py
@@ -2588,6 +2588,51 @@ class SpecifierPR(SpecifierFFPR):
         return super().match(desc=desc, record=record, mode="pr")
 
 
+@_dataclasses.dataclass(eq=True, frozen=True)
+class SpecifierMask(SpecifierPredicate):
+    @classmethod
+    def match(cls, desc, record, mode):
+        return super().match(desc=desc, record=record,
+            mode_match=lambda mode_arg: mode_arg == mode,
+            pred_match=lambda pred_arg: _SVP64PredicateType(pred_arg) in (
+                _SVP64PredicateType.INTEGER,
+                _SVP64PredicateType.CR,
+            ))
+
+    def assemble(self, insn):
+        raise NotImplementedError
+
+
+@_dataclasses.dataclass(eq=True, frozen=True)
+class SpecifierM(SpecifierMask):
+    @classmethod
+    def match(cls, desc, record):
+        return super().match(desc=desc, record=record, mode="m")
+
+    def assemble(self, insn):
+        insn.prefix.rm.mask = self.pred.mask
+
+
+@_dataclasses.dataclass(eq=True, frozen=True)
+class SpecifierSM(SpecifierMask):
+    @classmethod
+    def match(cls, desc, record):
+        return super().match(desc=desc, record=record, mode="sm")
+
+    def assemble(self, insn):
+        insn.prefix.rm.smask = self.pred.mask
+
+
+@_dataclasses.dataclass(eq=True, frozen=True)
+class SpecifierDM(SpecifierMask):
+    @classmethod
+    def match(cls, desc, record):
+        return super().match(desc=desc, record=record, mode="dm")
+
+    def assemble(self, insn):
+        insn.prefix.rm.mask = self.pred.mask
+
+
 class SVP64Instruction(PrefixedInstruction):
     """SVP64 instruction: https://libre-soc.org/openpower/sv/svp64/"""
     class Prefix(PrefixedInstruction.Prefix):
@@ -2617,6 +2662,9 @@ class SVP64Instruction(PrefixedInstruction):
             SpecifierSubVL,
             SpecifierFF,
             SpecifierPR,
+            SpecifierMask,
+            SpecifierSM,
+            SpecifierDM,
         )
 
         for spec_cls in specifiers:
-- 
2.30.2