From 19f983c4208629153614272b9fc59c3271f50807 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Thu, 16 Apr 2020 11:26:59 +0200 Subject: [PATCH] targets: manual define of the SDRAM PHY no longer needed. --- litex/boards/targets/kcu105.py | 1 - litex/boards/targets/versa_ecp5.py | 1 - 2 files changed, 2 deletions(-) diff --git a/litex/boards/targets/kcu105.py b/litex/boards/targets/kcu105.py index 6e90ec47..74023f67 100755 --- a/litex/boards/targets/kcu105.py +++ b/litex/boards/targets/kcu105.py @@ -67,7 +67,6 @@ class BaseSoC(SoCCore): iodelay_clk_freq = 200e6, cmd_latency = 0) self.add_csr("ddrphy") - self.add_constant("USDDRPHY") self.add_constant("USDDRPHY_DEBUG") self.add_sdram("sdram", phy = self.ddrphy, diff --git a/litex/boards/targets/versa_ecp5.py b/litex/boards/targets/versa_ecp5.py index 216d7bb3..49d8a651 100755 --- a/litex/boards/targets/versa_ecp5.py +++ b/litex/boards/targets/versa_ecp5.py @@ -87,7 +87,6 @@ class BaseSoC(SoCCore): platform.request("ddram"), sys_clk_freq=sys_clk_freq) self.add_csr("ddrphy") - self.add_constant("ECP5DDRPHY") self.comb += self.crg.stop.eq(self.ddrphy.init.stop) self.add_sdram("sdram", phy = self.ddrphy, -- 2.30.2