From 1a1b84322ba78c0705a14a62d0054d38f4b66364 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Mon, 9 Mar 2020 17:11:22 -0700 Subject: [PATCH] arch,base,cpu,dev,kern,mem,sim: Drop FS from FSTranslatingPortProxy. This translating proxy can be used in FS, or in SE with a failure handing case in place. Change-Id: I2e6421f52529fa833e42f8d3e64d4341c282634f Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26551 Tested-by: kokoro Reviewed-by: Matthew Poremba Maintainer: Gabe Black --- src/arch/arm/fastmodel/iris/thread_context.cc | 4 +-- src/arch/arm/freebsd/fs_workload.cc | 1 - src/arch/arm/linux/fs_workload.cc | 1 - src/arch/arm/stacktrace.cc | 2 +- src/arch/arm/system.cc | 1 - src/arch/arm/tracers/tarmac_parser.cc | 2 +- src/arch/arm/utility.cc | 2 +- src/arch/mips/stacktrace.cc | 2 +- src/arch/mips/utility.cc | 1 - src/arch/sparc/utility.cc | 2 +- src/arch/x86/stacktrace.cc | 2 +- src/base/remote_gdb.cc | 3 +-- src/cpu/simple_thread.cc | 2 +- src/cpu/thread_state.cc | 4 +-- src/cpu/thread_state.hh | 3 --- src/dev/arm/gic_v3_redistributor.cc | 1 - src/kern/linux/helpers.cc | 2 +- src/mem/SConscript | 2 +- src/mem/se_translating_port_proxy.cc | 4 +-- src/mem/se_translating_port_proxy.hh | 4 +-- ...ort_proxy.cc => translating_port_proxy.cc} | 14 +++++----- ...ort_proxy.hh => translating_port_proxy.hh} | 26 ++++--------------- src/sim/arguments.hh | 2 +- src/sim/vptr.hh | 2 +- 24 files changed, 32 insertions(+), 57 deletions(-) rename src/mem/{fs_translating_port_proxy.cc => translating_port_proxy.cc} (91%) rename src/mem/{fs_translating_port_proxy.hh => translating_port_proxy.hh} (79%) diff --git a/src/arch/arm/fastmodel/iris/thread_context.cc b/src/arch/arm/fastmodel/iris/thread_context.cc index 516565eb5..9aed27b7c 100644 --- a/src/arch/arm/fastmodel/iris/thread_context.cc +++ b/src/arch/arm/fastmodel/iris/thread_context.cc @@ -32,8 +32,8 @@ #include "arch/arm/utility.hh" #include "iris/detail/IrisCppAdapter.h" #include "iris/detail/IrisObjects.h" -#include "mem/fs_translating_port_proxy.hh" #include "mem/se_translating_port_proxy.hh" +#include "mem/translating_port_proxy.hh" namespace Iris { @@ -407,7 +407,7 @@ ThreadContext::initMemProxies(::ThreadContext *tc) assert(!physProxy && !virtProxy); physProxy.reset(new PortProxy(_cpu->getSendFunctional(), _cpu->cacheLineSize())); - virtProxy.reset(new FSTranslatingPortProxy(tc)); + virtProxy.reset(new TranslatingPortProxy(tc)); } else { assert(!virtProxy); virtProxy.reset(new SETranslatingPortProxy(this, diff --git a/src/arch/arm/freebsd/fs_workload.cc b/src/arch/arm/freebsd/fs_workload.cc index 33e012642..dbadb4b2a 100644 --- a/src/arch/arm/freebsd/fs_workload.cc +++ b/src/arch/arm/freebsd/fs_workload.cc @@ -43,7 +43,6 @@ #include "cpu/thread_context.hh" #include "debug/Loader.hh" #include "kern/freebsd/events.hh" -#include "mem/fs_translating_port_proxy.hh" #include "mem/physical.hh" #include "sim/stat_control.hh" diff --git a/src/arch/arm/linux/fs_workload.cc b/src/arch/arm/linux/fs_workload.cc index 9390a464d..c21ce09f7 100644 --- a/src/arch/arm/linux/fs_workload.cc +++ b/src/arch/arm/linux/fs_workload.cc @@ -55,7 +55,6 @@ #include "kern/linux/events.hh" #include "kern/linux/helpers.hh" #include "kern/system_events.hh" -#include "mem/fs_translating_port_proxy.hh" #include "mem/physical.hh" #include "sim/stat_control.hh" diff --git a/src/arch/arm/stacktrace.cc b/src/arch/arm/stacktrace.cc index 460452427..b5a9976cf 100644 --- a/src/arch/arm/stacktrace.cc +++ b/src/arch/arm/stacktrace.cc @@ -35,7 +35,7 @@ #include "base/trace.hh" #include "cpu/base.hh" #include "cpu/thread_context.hh" -#include "mem/fs_translating_port_proxy.hh" +#include "mem/port_proxy.hh" #include "sim/system.hh" namespace ArmISA diff --git a/src/arch/arm/system.cc b/src/arch/arm/system.cc index 9053a5c7d..97c3c5f3c 100644 --- a/src/arch/arm/system.cc +++ b/src/arch/arm/system.cc @@ -49,7 +49,6 @@ #include "cpu/thread_context.hh" #include "dev/arm/fvp_base_pwr_ctrl.hh" #include "dev/arm/gic_v2.hh" -#include "mem/fs_translating_port_proxy.hh" #include "mem/physical.hh" using namespace std; diff --git a/src/arch/arm/tracers/tarmac_parser.cc b/src/arch/arm/tracers/tarmac_parser.cc index a5fc32dbb..96678b07b 100644 --- a/src/arch/arm/tracers/tarmac_parser.cc +++ b/src/arch/arm/tracers/tarmac_parser.cc @@ -48,8 +48,8 @@ #include "config/the_isa.hh" #include "cpu/static_inst.hh" #include "cpu/thread_context.hh" -#include "mem/fs_translating_port_proxy.hh" #include "mem/packet.hh" +#include "mem/port_proxy.hh" #include "sim/core.hh" #include "sim/faults.hh" #include "sim/sim_exit.hh" diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc index 393f141b0..7c70def08 100644 --- a/src/arch/arm/utility.cc +++ b/src/arch/arm/utility.cc @@ -46,7 +46,7 @@ #include "cpu/base.hh" #include "cpu/checker/cpu.hh" #include "cpu/thread_context.hh" -#include "mem/fs_translating_port_proxy.hh" +#include "mem/port_proxy.hh" #include "sim/full_system.hh" namespace ArmISA diff --git a/src/arch/mips/stacktrace.cc b/src/arch/mips/stacktrace.cc index 651719a02..ec5597c55 100644 --- a/src/arch/mips/stacktrace.cc +++ b/src/arch/mips/stacktrace.cc @@ -35,7 +35,7 @@ #include "base/trace.hh" #include "cpu/base.hh" #include "cpu/thread_context.hh" -#include "mem/fs_translating_port_proxy.hh" +#include "mem/port_proxy.hh" #include "sim/system.hh" using namespace MipsISA; diff --git a/src/arch/mips/utility.cc b/src/arch/mips/utility.cc index b42635fc4..7e797b57f 100644 --- a/src/arch/mips/utility.cc +++ b/src/arch/mips/utility.cc @@ -36,7 +36,6 @@ #include "base/logging.hh" #include "cpu/static_inst.hh" #include "cpu/thread_context.hh" -#include "mem/fs_translating_port_proxy.hh" #include "sim/serialize.hh" using namespace MipsISA; diff --git a/src/arch/sparc/utility.cc b/src/arch/sparc/utility.cc index ac442cad5..21fbf939d 100644 --- a/src/arch/sparc/utility.cc +++ b/src/arch/sparc/utility.cc @@ -29,7 +29,7 @@ #include "arch/sparc/utility.hh" #include "arch/sparc/faults.hh" -#include "mem/fs_translating_port_proxy.hh" +#include "mem/port_proxy.hh" namespace SparcISA { diff --git a/src/arch/x86/stacktrace.cc b/src/arch/x86/stacktrace.cc index 3fe9ce4f1..64f2d4b1d 100644 --- a/src/arch/x86/stacktrace.cc +++ b/src/arch/x86/stacktrace.cc @@ -35,7 +35,7 @@ #include "base/trace.hh" #include "cpu/base.hh" #include "cpu/thread_context.hh" -#include "mem/fs_translating_port_proxy.hh" +#include "mem/port_proxy.hh" #include "sim/system.hh" namespace X86ISA diff --git a/src/base/remote_gdb.cc b/src/base/remote_gdb.cc index ada5e27d6..0660827e9 100644 --- a/src/base/remote_gdb.cc +++ b/src/base/remote_gdb.cc @@ -146,9 +146,8 @@ #include "cpu/static_inst.hh" #include "cpu/thread_context.hh" #include "debug/GDBAll.hh" -#include "mem/fs_translating_port_proxy.hh" #include "mem/port.hh" -#include "mem/se_translating_port_proxy.hh" +#include "mem/port_proxy.hh" #include "sim/full_system.hh" #include "sim/system.hh" diff --git a/src/cpu/simple_thread.cc b/src/cpu/simple_thread.cc index 30806a7c7..7574c4d7e 100644 --- a/src/cpu/simple_thread.cc +++ b/src/cpu/simple_thread.cc @@ -55,8 +55,8 @@ #include "cpu/profile.hh" #include "cpu/quiesce_event.hh" #include "cpu/thread_context.hh" -#include "mem/fs_translating_port_proxy.hh" #include "mem/se_translating_port_proxy.hh" +#include "mem/translating_port_proxy.hh" #include "params/BaseCPU.hh" #include "sim/faults.hh" #include "sim/full_system.hh" diff --git a/src/cpu/thread_state.cc b/src/cpu/thread_state.cc index 2210a7628..07176b72e 100644 --- a/src/cpu/thread_state.cc +++ b/src/cpu/thread_state.cc @@ -33,10 +33,10 @@ #include "cpu/profile.hh" #include "cpu/quiesce_event.hh" #include "kern/kernel_stats.hh" -#include "mem/fs_translating_port_proxy.hh" #include "mem/port.hh" #include "mem/port_proxy.hh" #include "mem/se_translating_port_proxy.hh" +#include "mem/translating_port_proxy.hh" #include "sim/full_system.hh" #include "sim/serialize.hh" #include "sim/system.hh" @@ -112,7 +112,7 @@ ThreadState::initMemProxies(ThreadContext *tc) baseCpu->cacheLineSize()); assert(virtProxy == NULL); - virtProxy = new FSTranslatingPortProxy(tc); + virtProxy = new TranslatingPortProxy(tc); } else { assert(virtProxy == NULL); virtProxy = new SETranslatingPortProxy( diff --git a/src/cpu/thread_state.hh b/src/cpu/thread_state.hh index df80cdc4a..dd93c68f4 100644 --- a/src/cpu/thread_state.hh +++ b/src/cpu/thread_state.hh @@ -45,9 +45,6 @@ namespace Kernel { class Checkpoint; -class FSTranslatingPortProxy; -class SETranslatingPortProxy; - /** * Struct for holding general thread state that is needed across CPU * models. This includes things such as pointers to the process, diff --git a/src/dev/arm/gic_v3_redistributor.cc b/src/dev/arm/gic_v3_redistributor.cc index 629f162e8..a9b3f93a5 100644 --- a/src/dev/arm/gic_v3_redistributor.cc +++ b/src/dev/arm/gic_v3_redistributor.cc @@ -44,7 +44,6 @@ #include "debug/GIC.hh" #include "dev/arm/gic_v3_cpu_interface.hh" #include "dev/arm/gic_v3_distributor.hh" -#include "mem/fs_translating_port_proxy.hh" const AddrRange Gicv3Redistributor::GICR_IPRIORITYR(SGI_base + 0x0400, SGI_base + 0x0420); diff --git a/src/kern/linux/helpers.cc b/src/kern/linux/helpers.cc index a7c21837e..559844004 100644 --- a/src/kern/linux/helpers.cc +++ b/src/kern/linux/helpers.cc @@ -40,7 +40,7 @@ #include "arch/isa_traits.hh" #include "config/the_isa.hh" #include "cpu/thread_context.hh" -#include "mem/fs_translating_port_proxy.hh" +#include "mem/port_proxy.hh" #include "sim/byteswap.hh" #include "sim/system.hh" diff --git a/src/mem/SConscript b/src/mem/SConscript index d4eb4615b..f7636b235 100644 --- a/src/mem/SConscript +++ b/src/mem/SConscript @@ -81,7 +81,7 @@ Source('serial_link.cc') Source('mem_delay.cc') if env['TARGET_ISA'] != 'null': - Source('fs_translating_port_proxy.cc') + Source('translating_port_proxy.cc') Source('se_translating_port_proxy.cc') Source('page_table.cc') diff --git a/src/mem/se_translating_port_proxy.cc b/src/mem/se_translating_port_proxy.cc index 8bab243cb..458b2fad5 100644 --- a/src/mem/se_translating_port_proxy.cc +++ b/src/mem/se_translating_port_proxy.cc @@ -44,8 +44,8 @@ #include "sim/system.hh" SETranslatingPortProxy::SETranslatingPortProxy( - ThreadContext *tc, AllocType alloc) - : FSTranslatingPortProxy(tc), allocating(alloc) + ThreadContext *tc, AllocType alloc) : + TranslatingPortProxy(tc), allocating(alloc) {} bool diff --git a/src/mem/se_translating_port_proxy.hh b/src/mem/se_translating_port_proxy.hh index 96e17714c..1b6be8a25 100644 --- a/src/mem/se_translating_port_proxy.hh +++ b/src/mem/se_translating_port_proxy.hh @@ -41,9 +41,9 @@ #ifndef __MEM_SE_TRANSLATING_PORT_PROXY_HH__ #define __MEM_SE_TRANSLATING_PORT_PROXY_HH__ -#include "mem/fs_translating_port_proxy.hh" +#include "mem/translating_port_proxy.hh" -class SETranslatingPortProxy : public FSTranslatingPortProxy +class SETranslatingPortProxy : public TranslatingPortProxy { public: diff --git a/src/mem/fs_translating_port_proxy.cc b/src/mem/translating_port_proxy.cc similarity index 91% rename from src/mem/fs_translating_port_proxy.cc rename to src/mem/translating_port_proxy.cc index 99a4b8e48..c44ff5fca 100644 --- a/src/mem/fs_translating_port_proxy.cc +++ b/src/mem/translating_port_proxy.cc @@ -43,21 +43,21 @@ * Port object definitions. */ -#include "mem/fs_translating_port_proxy.hh" +#include "mem/translating_port_proxy.hh" #include "base/chunk_generator.hh" #include "cpu/base.hh" #include "cpu/thread_context.hh" #include "sim/system.hh" -FSTranslatingPortProxy::FSTranslatingPortProxy(ThreadContext *tc) : +TranslatingPortProxy::TranslatingPortProxy(ThreadContext *tc) : PortProxy(tc->getCpuPtr()->getSendFunctional(), tc->getSystemPtr()->cacheLineSize()), _tc(tc), pageBytes(tc->getSystemPtr()->getPageBytes()) {} bool -FSTranslatingPortProxy::tryTLBsOnce(RequestPtr req, BaseTLB::Mode mode) const +TranslatingPortProxy::tryTLBsOnce(RequestPtr req, BaseTLB::Mode mode) const { BaseTLB *dtb = _tc->getDTBPtr(); BaseTLB *itb = _tc->getDTBPtr(); @@ -66,7 +66,7 @@ FSTranslatingPortProxy::tryTLBsOnce(RequestPtr req, BaseTLB::Mode mode) const } bool -FSTranslatingPortProxy::tryTLBs(RequestPtr req, BaseTLB::Mode mode) const +TranslatingPortProxy::tryTLBs(RequestPtr req, BaseTLB::Mode mode) const { // If at first this doesn't succeed, try to fixup and translate again. If // it still fails, report failure. @@ -75,7 +75,7 @@ FSTranslatingPortProxy::tryTLBs(RequestPtr req, BaseTLB::Mode mode) const } bool -FSTranslatingPortProxy::tryReadBlob(Addr addr, void *p, int size) const +TranslatingPortProxy::tryReadBlob(Addr addr, void *p, int size) const { for (ChunkGenerator gen(addr, size, pageBytes); !gen.done(); gen.next()) @@ -96,7 +96,7 @@ FSTranslatingPortProxy::tryReadBlob(Addr addr, void *p, int size) const } bool -FSTranslatingPortProxy::tryWriteBlob( +TranslatingPortProxy::tryWriteBlob( Addr addr, const void *p, int size) const { for (ChunkGenerator gen(addr, size, pageBytes); !gen.done(); @@ -117,7 +117,7 @@ FSTranslatingPortProxy::tryWriteBlob( } bool -FSTranslatingPortProxy::tryMemsetBlob(Addr address, uint8_t v, int size) const +TranslatingPortProxy::tryMemsetBlob(Addr address, uint8_t v, int size) const { for (ChunkGenerator gen(address, size, pageBytes); !gen.done(); gen.next()) diff --git a/src/mem/fs_translating_port_proxy.hh b/src/mem/translating_port_proxy.hh similarity index 79% rename from src/mem/fs_translating_port_proxy.hh rename to src/mem/translating_port_proxy.hh index c3f1bc6eb..1e17c64be 100644 --- a/src/mem/fs_translating_port_proxy.hh +++ b/src/mem/translating_port_proxy.hh @@ -38,23 +38,8 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -/** - * @file - * TranslatingPortProxy Object Declaration for FS. - * - * Port proxies are used when non structural entities need access to - * the memory system. Proxy objects replace the previous - * FunctionalPort, TranslatingPort and VirtualPort objects, which - * provided the same functionality as the proxies, but were instances - * of ports not corresponding to real structural ports of the - * simulated system. Via the port proxies all the accesses go through - * an actual port and thus are transparent to a potentially - * distributed memory and automatically adhere to the memory map of - * the system. - */ - -#ifndef __MEM_FS_TRANSLATING_PORT_PROXY_HH__ -#define __MEM_FS_TRANSLATING_PORT_PROXY_HH__ +#ifndef __MEM_TRANSLATING_PORT_PROXY_HH__ +#define __MEM_TRANSLATING_PORT_PROXY_HH__ #include "arch/generic/tlb.hh" #include "mem/port_proxy.hh" @@ -67,7 +52,7 @@ class ThreadContext; * recover, and then attempt the translation again. If it still fails then the * access as a whole fails. */ -class FSTranslatingPortProxy : public PortProxy +class TranslatingPortProxy : public PortProxy { private: bool tryTLBsOnce(RequestPtr req, BaseTLB::Mode) const; @@ -85,8 +70,7 @@ class FSTranslatingPortProxy : public PortProxy public: - FSTranslatingPortProxy(ThreadContext* tc); - ~FSTranslatingPortProxy() {} + TranslatingPortProxy(ThreadContext* tc); /** Version of tryReadblob that translates virt->phys and deals * with page boundries. */ @@ -102,4 +86,4 @@ class FSTranslatingPortProxy : public PortProxy bool tryMemsetBlob(Addr address, uint8_t v, int size) const override; }; -#endif //__MEM_FS_TRANSLATING_PORT_PROXY_HH__ +#endif //__MEM_TRANSLATING_PORT_PROXY_HH__ diff --git a/src/sim/arguments.hh b/src/sim/arguments.hh index da7a8edce..2861e4dd6 100644 --- a/src/sim/arguments.hh +++ b/src/sim/arguments.hh @@ -33,7 +33,7 @@ #include #include "cpu/thread_context.hh" -#include "mem/fs_translating_port_proxy.hh" +#include "mem/port_proxy.hh" class Arguments { diff --git a/src/sim/vptr.hh b/src/sim/vptr.hh index d1ec32af6..92aea797c 100644 --- a/src/sim/vptr.hh +++ b/src/sim/vptr.hh @@ -29,7 +29,7 @@ #ifndef __SIM_VPTR_HH__ #define __SIM_VPTR_HH__ -#include "mem/fs_translating_port_proxy.hh" +#include "mem/port_proxy.hh" class ThreadContext; -- 2.30.2