From 1a3fd11aefdf6ed327f633ea7e13bae2e8a92ca7 Mon Sep 17 00:00:00 2001 From: Chris Forbes Date: Mon, 4 Aug 2014 19:37:58 +1200 Subject: [PATCH] i965/vec4: Pass sampler index in src1 for texture ops Signed-off-by: Chris Forbes Reviewed-by: Matt Turner Reviewed-by: Ian Romanick --- src/mesa/drivers/dri/i965/brw_vec4.h | 6 +++--- src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 12 ++++++++---- 2 files changed, 11 insertions(+), 7 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h index 950b592120f..74a0568e0c6 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.h +++ b/src/mesa/drivers/dri/i965/brw_vec4.h @@ -526,10 +526,10 @@ public: void emit_pack_half_2x16(dst_reg dst, src_reg src0); void emit_unpack_half_2x16(dst_reg dst, src_reg src0); - uint32_t gather_channel(ir_texture *ir, int sampler); - src_reg emit_mcs_fetch(ir_texture *ir, src_reg coordinate, int sampler); + uint32_t gather_channel(ir_texture *ir, uint32_t sampler); + src_reg emit_mcs_fetch(ir_texture *ir, src_reg coordinate, uint32_t sampler); void emit_gen6_gather_wa(uint8_t wa, dst_reg dst); - void swizzle_result(ir_texture *ir, src_reg orig_val, int sampler); + void swizzle_result(ir_texture *ir, src_reg orig_val, uint32_t sampler); void emit_ndc_computation(); void emit_psiz_and_flags(struct brw_reg reg); diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp index 822eb6c630f..a47c3a6e96d 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp @@ -2277,7 +2277,7 @@ vec4_visitor::visit(ir_call *ir) } src_reg -vec4_visitor::emit_mcs_fetch(ir_texture *ir, src_reg coordinate, int sampler) +vec4_visitor::emit_mcs_fetch(ir_texture *ir, src_reg coordinate, uint32_t sampler) { vec4_instruction *inst = new(mem_ctx) vec4_instruction(this, SHADER_OPCODE_TXF_MCS); inst->base_mrf = 2; @@ -2286,6 +2286,8 @@ vec4_visitor::emit_mcs_fetch(ir_texture *ir, src_reg coordinate, int sampler) inst->dst = dst_reg(this, glsl_type::uvec4_type); inst->dst.writemask = WRITEMASK_XYZW; + inst->src[1] = src_reg(sampler); + /* parameters are: u, v, r, lod; lod will always be zero due to api restrictions */ int param_base = inst->base_mrf; int coord_mask = (1 << ir->coordinate->type->vector_elements) - 1; @@ -2304,7 +2306,7 @@ vec4_visitor::emit_mcs_fetch(ir_texture *ir, src_reg coordinate, int sampler) void vec4_visitor::visit(ir_texture *ir) { - int sampler = + uint32_t sampler = _mesa_get_sampler_uniform_value(ir->sampler, shader_prog, prog); /* When tg4 is used with the degenerate ZERO/ONE swizzles, don't bother @@ -2437,6 +2439,8 @@ vec4_visitor::visit(ir_texture *ir) inst->dst.writemask = WRITEMASK_XYZW; inst->shadow_compare = ir->shadow_comparitor != NULL; + inst->src[1] = src_reg(sampler); + /* MRF for the first parameter */ int param_base = inst->base_mrf + inst->header_present; @@ -2588,7 +2592,7 @@ vec4_visitor::emit_gen6_gather_wa(uint8_t wa, dst_reg dst) * Set up the gather channel based on the swizzle, for gather4. */ uint32_t -vec4_visitor::gather_channel(ir_texture *ir, int sampler) +vec4_visitor::gather_channel(ir_texture *ir, uint32_t sampler) { ir_constant *chan = ir->lod_info.component->as_constant(); int swiz = GET_SWZ(key->tex.swizzles[sampler], chan->value.i[0]); @@ -2609,7 +2613,7 @@ vec4_visitor::gather_channel(ir_texture *ir, int sampler) } void -vec4_visitor::swizzle_result(ir_texture *ir, src_reg orig_val, int sampler) +vec4_visitor::swizzle_result(ir_texture *ir, src_reg orig_val, uint32_t sampler) { int s = key->tex.swizzles[sampler]; -- 2.30.2