From 1a972d0f7d050692b4a622e78893832d1cf7082e Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 1 Jun 2020 11:29:00 +0100 Subject: [PATCH] invert SPR1/2 in branch output data --- src/soc/fu/branch/pipe_data.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/soc/fu/branch/pipe_data.py b/src/soc/fu/branch/pipe_data.py index f32872b1..78cab605 100644 --- a/src/soc/fu/branch/pipe_data.py +++ b/src/soc/fu/branch/pipe_data.py @@ -74,8 +74,8 @@ class BranchOutputData(IntegerData): self.nia = Data(64, name="nia") # convenience variables. - self.lr = self.tar = self.spr1 - self.ctr = self.spr2 + self.ctr = self.spr1 + self.lr = self.tar = self.spr2 def __iter__(self): yield from super().__iter__() -- 2.30.2