From 1b2f3e53e0b67843bffa12d0ae54b2052c7cddc6 Mon Sep 17 00:00:00 2001 From: lkcl Date: Tue, 29 Mar 2022 01:10:08 +0100 Subject: [PATCH] --- openpower/sv/cr_int_predication.mdwn | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/openpower/sv/cr_int_predication.mdwn b/openpower/sv/cr_int_predication.mdwn index 92c335cd9..8baa3a2ef 100644 --- a/openpower/sv/cr_int_predication.mdwn +++ b/openpower/sv/cr_int_predication.mdwn @@ -211,12 +211,9 @@ Note that: * in the scalar case the CR-Vector assessment is stored bit-wise starting at the LSB of the destination scalar INT -* in the INT-vector case the result is stored in the - LSB of each element in the result vector - -Note that element width overrides are respected on the INT src or destination register, however that it is the CR element-width -override that is used to indicate how many bits of CR results -are packed/extracted into/from each INT register +* in the INT-vector case the results are packed into LSBs + of the INT Elements, the packing arrangement depending on both + elwidth override settings. # v3.1 setbc instructions -- 2.30.2