From 1b3832cf92efd1db8e929268649a9b62c58d89cf Mon Sep 17 00:00:00 2001 From: Claire Xenia Wolf Date: Sun, 31 Oct 2021 14:42:39 +0100 Subject: [PATCH] Fixed names and links --- COPYING | 2 +- README.md | 6 ++---- docs/source/conf.py | 2 +- docs/source/install.rst | 2 +- docs/source/license.rst | 2 +- extern/picorv32.v | 2 +- sbysrc/sby.py | 2 +- sbysrc/sby_core.py | 2 +- sbysrc/sby_engine_abc.py | 2 +- sbysrc/sby_engine_aiger.py | 2 +- sbysrc/sby_engine_btor.py | 2 +- sbysrc/sby_engine_smtbmc.py | 2 +- sbysrc/sby_mode_bmc.py | 2 +- sbysrc/sby_mode_cover.py | 2 +- sbysrc/sby_mode_live.py | 2 +- sbysrc/sby_mode_prove.py | 2 +- 16 files changed, 17 insertions(+), 19 deletions(-) diff --git a/COPYING b/COPYING index 33b1062..eba1da2 100644 --- a/COPYING +++ b/COPYING @@ -1,6 +1,6 @@ SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows -Copyright (C) 2016 Clifford Wolf +Copyright (C) 2016 Claire Xenia Wolf Permission to use, copy, modify, and/or distribute this software for any purpose with or without fee is hereby granted, provided that the above diff --git a/README.md b/README.md index a12779d..aedb98f 100644 --- a/README.md +++ b/README.md @@ -1,5 +1,3 @@ -SymbiYosys (sby) is a front-end driver program for [Yosys](http://www.clifford.at/yosys)-based formal hardware verification flows. See [http://symbiyosys.readthedocs.io/](http://symbiyosys.readthedocs.io/) for documentation on how to use SymbiYosys. +SymbiYosys (sby) is a front-end driver program for [Yosys](https://yosyshq.net/yosys/)-based formal hardware verification flows. See [https://yosyshq.readthedocs.io/projects/sby/](https://yosyshq.readthedocs.io/projects/sby/) for documentation on how to use SymbiYosys. -Many example designs using SymbiYosys have been published on the [ZipCPU blog](http://zipcpu.com). Please consider browsing the [formal verification page](http://zipcpu.com/formal/formal.html) of the [ZipCPU blog](http://zipcpu.com) for examples and commentary. - -SymbiYosys (sby) itself is licensed under the ISC license, note that the solvers and other components used by SymbiYosys come with their own license terms. There is some more details in the ["Selecting the right engine" section of the documentation](https://symbiyosys.readthedocs.io/en/latest/quickstart.html#selecting-the-right-engine). +SymbiYosys (sby) itself is licensed under the ISC license, note that the solvers and other components used by SymbiYosys come with their own license terms. There is some more details in the ["Selecting the right engine" section of the documentation](https://yosyshq.readthedocs.io/projects/sby/en/latest/quickstart.html#selecting-the-right-engine). diff --git a/docs/source/conf.py b/docs/source/conf.py index 666d419..dadf507 100644 --- a/docs/source/conf.py +++ b/docs/source/conf.py @@ -15,7 +15,7 @@ highlight_language = 'systemverilog' html_theme_options = { 'extra_nav_links' : { - 'YosysHQ Docs' : 'https://yosyshq-docs.readthedocs.io' , + 'YosysHQ Docs' : 'https://yosyshq.readthedocs.io' , 'YosysHQ Website' : 'https://www.yosyshq.com', }, # 'logo' : 'logo.png', diff --git a/docs/source/install.rst b/docs/source/install.rst index 076b8a8..273b166 100644 --- a/docs/source/install.rst +++ b/docs/source/install.rst @@ -21,7 +21,7 @@ Installing prerequisites (this command is for Ubuntu 16.04): Yosys, Yosys-SMTBMC and ABC --------------------------- -http://www.clifford.at/yosys/ +https://yosyshq.net/yosys/ https://people.eecs.berkeley.edu/~alanmi/abc/ diff --git a/docs/source/license.rst b/docs/source/license.rst index 843fe2a..e102ae1 100644 --- a/docs/source/license.rst +++ b/docs/source/license.rst @@ -8,7 +8,7 @@ SymbiYosys (sby) itself is licensed under the ISC license: SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows - Copyright (C) 2016 Clifford Wolf + Copyright (C) 2016 Claire Xenia Wolf Permission to use, copy, modify, and/or distribute this software for any purpose with or without fee is hereby granted, provided that the above diff --git a/extern/picorv32.v b/extern/picorv32.v index 6364cbe..cfc7ce0 100644 --- a/extern/picorv32.v +++ b/extern/picorv32.v @@ -1,7 +1,7 @@ /* * PicoRV32 -- A Small RISC-V (RV32I) Processor Core * - * Copyright (C) 2015 Clifford Wolf + * Copyright (C) 2015 Claire Xenia Wolf * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above diff --git a/sbysrc/sby.py b/sbysrc/sby.py index 90c8455..a939a2c 100644 --- a/sbysrc/sby.py +++ b/sbysrc/sby.py @@ -2,7 +2,7 @@ # # SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows # -# Copyright (C) 2016 Clifford Wolf +# Copyright (C) 2016 Claire Xenia Wolf # # Permission to use, copy, modify, and/or distribute this software for any # purpose with or without fee is hereby granted, provided that the above diff --git a/sbysrc/sby_core.py b/sbysrc/sby_core.py index dbc05d3..979be6f 100644 --- a/sbysrc/sby_core.py +++ b/sbysrc/sby_core.py @@ -1,7 +1,7 @@ # # SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows # -# Copyright (C) 2016 Clifford Wolf +# Copyright (C) 2016 Claire Xenia Wolf # # Permission to use, copy, modify, and/or distribute this software for any # purpose with or without fee is hereby granted, provided that the above diff --git a/sbysrc/sby_engine_abc.py b/sbysrc/sby_engine_abc.py index 919cc35..e024a43 100644 --- a/sbysrc/sby_engine_abc.py +++ b/sbysrc/sby_engine_abc.py @@ -1,7 +1,7 @@ # # SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows # -# Copyright (C) 2016 Clifford Wolf +# Copyright (C) 2016 Claire Xenia Wolf # # Permission to use, copy, modify, and/or distribute this software for any # purpose with or without fee is hereby granted, provided that the above diff --git a/sbysrc/sby_engine_aiger.py b/sbysrc/sby_engine_aiger.py index 7a9510d..ffb8f52 100644 --- a/sbysrc/sby_engine_aiger.py +++ b/sbysrc/sby_engine_aiger.py @@ -1,7 +1,7 @@ # # SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows # -# Copyright (C) 2016 Clifford Wolf +# Copyright (C) 2016 Claire Xenia Wolf # # Permission to use, copy, modify, and/or distribute this software for any # purpose with or without fee is hereby granted, provided that the above diff --git a/sbysrc/sby_engine_btor.py b/sbysrc/sby_engine_btor.py index ac56cd9..5763410 100644 --- a/sbysrc/sby_engine_btor.py +++ b/sbysrc/sby_engine_btor.py @@ -1,7 +1,7 @@ # # SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows # -# Copyright (C) 2016 Clifford Wolf +# Copyright (C) 2016 Claire Xenia Wolf # # Permission to use, copy, modify, and/or distribute this software for any # purpose with or without fee is hereby granted, provided that the above diff --git a/sbysrc/sby_engine_smtbmc.py b/sbysrc/sby_engine_smtbmc.py index c21a3f7..2ad853f 100644 --- a/sbysrc/sby_engine_smtbmc.py +++ b/sbysrc/sby_engine_smtbmc.py @@ -1,7 +1,7 @@ # # SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows # -# Copyright (C) 2016 Clifford Wolf +# Copyright (C) 2016 Claire Xenia Wolf # # Permission to use, copy, modify, and/or distribute this software for any # purpose with or without fee is hereby granted, provided that the above diff --git a/sbysrc/sby_mode_bmc.py b/sbysrc/sby_mode_bmc.py index eed3f4a..eff0a5c 100644 --- a/sbysrc/sby_mode_bmc.py +++ b/sbysrc/sby_mode_bmc.py @@ -1,7 +1,7 @@ # # SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows # -# Copyright (C) 2016 Clifford Wolf +# Copyright (C) 2016 Claire Xenia Wolf # # Permission to use, copy, modify, and/or distribute this software for any # purpose with or without fee is hereby granted, provided that the above diff --git a/sbysrc/sby_mode_cover.py b/sbysrc/sby_mode_cover.py index a078370..da3c1ad 100644 --- a/sbysrc/sby_mode_cover.py +++ b/sbysrc/sby_mode_cover.py @@ -1,7 +1,7 @@ # # SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows # -# Copyright (C) 2016 Clifford Wolf +# Copyright (C) 2016 Claire Xenia Wolf # # Permission to use, copy, modify, and/or distribute this software for any # purpose with or without fee is hereby granted, provided that the above diff --git a/sbysrc/sby_mode_live.py b/sbysrc/sby_mode_live.py index c58f562..26cca22 100644 --- a/sbysrc/sby_mode_live.py +++ b/sbysrc/sby_mode_live.py @@ -1,7 +1,7 @@ # # SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows # -# Copyright (C) 2016 Clifford Wolf +# Copyright (C) 2016 Claire Xenia Wolf # # Permission to use, copy, modify, and/or distribute this software for any # purpose with or without fee is hereby granted, provided that the above diff --git a/sbysrc/sby_mode_prove.py b/sbysrc/sby_mode_prove.py index 6591e0d..e8fbd20 100644 --- a/sbysrc/sby_mode_prove.py +++ b/sbysrc/sby_mode_prove.py @@ -1,7 +1,7 @@ # # SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows # -# Copyright (C) 2016 Clifford Wolf +# Copyright (C) 2016 Claire Xenia Wolf # # Permission to use, copy, modify, and/or distribute this software for any # purpose with or without fee is hereby granted, provided that the above -- 2.30.2