From 1b5572edb8caaed2f31a7235b8c58628da6bdb8f Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Wed, 3 Feb 2021 09:04:26 +0100 Subject: [PATCH] i386: Remove V1DImode shift expanders [PR98287] On Tue, Feb 02, 2021 at 02:23:55PM +0100, Richard Biener wrote: > All I say is that the x86 target > should either not advertise V1DF shifts or advertise the basic > ops that reasonable simplification would expect to exist. The backend has several V1?Imode shifts, but optab only for those V1DImode ones: grep '[la]sh[lr]v1[qhsdtox]' tmp-mddump.md (define_insn ("mmx_ashlv1di3") (define_insn ("mmx_lshrv1di3") (define_insn ("avx512bw_ashlv1ti3") (define_insn ("avx512bw_lshrv1ti3") (define_insn ("sse2_ashlv1ti3") (define_insn ("sse2_lshrv1ti3") (define_expand ("ashlv1di3") (define_expand ("lshrv1di3") emit_insn (gen_sse2_lshrv1ti3 (tmp, gen_lowpart (V1TImode, operands[1]), I think it has been introduced with https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021#c13 Before we didn't have any V1DImode expanders (except mov/movmisalign, but those are needed and are supplied for other V1??mode modes too). This patch just removes the two V1DImode shift expanders with standard names. 2021-02-03 Jakub Jelinek PR tree-optimization/98287 * config/i386/mmx.md (3): For shifts don't enable expander for V1DImode. * gcc.dg/pr98287.c: New test. --- gcc/config/i386/mmx.md | 6 +++--- gcc/testsuite/gcc.dg/pr98287.c | 19 +++++++++++++++++++ 2 files changed, 22 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/pr98287.c diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index a6ddc710a84..9e5a4d1f283 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -1528,9 +1528,9 @@ (set_attr "mode" "DI,TI,TI")]) (define_expand "3" - [(set (match_operand:MMXMODE248 0 "register_operand") - (any_lshift:MMXMODE248 - (match_operand:MMXMODE248 1 "register_operand") + [(set (match_operand:MMXMODE24 0 "register_operand") + (any_lshift:MMXMODE24 + (match_operand:MMXMODE24 1 "register_operand") (match_operand:DI 2 "nonmemory_operand")))] "TARGET_MMX_WITH_SSE") diff --git a/gcc/testsuite/gcc.dg/pr98287.c b/gcc/testsuite/gcc.dg/pr98287.c new file mode 100644 index 00000000000..031442850c6 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr98287.c @@ -0,0 +1,19 @@ +/* PR tree-optimization/98287 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -fno-tree-ccp -fno-tree-forwprop -Wno-psabi -w" } */ + +typedef unsigned long __attribute__((__vector_size__ (8))) V; +V v; + +static __attribute__((noinline, noclone)) V +bar (unsigned short s) +{ + return v >> s << s | v >> s >> 63; +} + +unsigned long +foo (void) +{ + V x = bar (1); + return x[0]; +} -- 2.30.2