From 1bad691a177240e8281592fa66c9e6ab0869f618 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Mon, 6 Jul 2009 00:00:10 -0400 Subject: [PATCH] R6xx/r7xx: first pass at texture support texture bo setup isn't quite working yet --- src/mesa/drivers/dri/r600/Makefile | 3 +- src/mesa/drivers/dri/r600/r600_cmdbuf.c | 2 +- src/mesa/drivers/dri/r600/r600_context.c | 2 +- src/mesa/drivers/dri/r600/r600_tex.c | 438 +++++ src/mesa/drivers/dri/r600/r600_tex.h | 63 + src/mesa/drivers/dri/r600/r600_texstate.c | 795 +++++++++ src/mesa/drivers/dri/r600/r700_chip.c | 2 +- src/mesa/drivers/dri/r600/r700_chip.h | 4 +- src/mesa/drivers/dri/r600/r700_render.c | 74 +- src/mesa/drivers/dri/r600/r700_tex.c | 1558 ----------------- src/mesa/drivers/dri/r600/r700_tex.h | 104 -- .../dri/radeon/radeon_common_context.h | 13 + src/mesa/drivers/dri/radeon/radeon_screen.c | 8 +- 13 files changed, 1365 insertions(+), 1701 deletions(-) create mode 100644 src/mesa/drivers/dri/r600/r600_tex.c create mode 100644 src/mesa/drivers/dri/r600/r600_tex.h create mode 100644 src/mesa/drivers/dri/r600/r600_texstate.c delete mode 100644 src/mesa/drivers/dri/r600/r700_tex.c delete mode 100644 src/mesa/drivers/dri/r600/r700_tex.h diff --git a/src/mesa/drivers/dri/r600/Makefile b/src/mesa/drivers/dri/r600/Makefile index 667eb1f919c..6db0154784c 100644 --- a/src/mesa/drivers/dri/r600/Makefile +++ b/src/mesa/drivers/dri/r600/Makefile @@ -50,7 +50,8 @@ DRIVER_SOURCES = \ r700_state.c \ r700_clear.c \ r700_render.c \ - r700_tex.c \ + r600_tex.c \ + r600_texstate.c \ r700_debug.c \ $(RADEON_COMMON_SOURCES) \ $(EGL_SOURCES) diff --git a/src/mesa/drivers/dri/r600/r600_cmdbuf.c b/src/mesa/drivers/dri/r600/r600_cmdbuf.c index 90f546edf1e..4609e86bb93 100644 --- a/src/mesa/drivers/dri/r600/r600_cmdbuf.c +++ b/src/mesa/drivers/dri/r600/r600_cmdbuf.c @@ -52,7 +52,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "radeon_mipmap_tree.h" #include "radeon_reg.h" -struct r600_cs_manager_legacy +struct r600_cs_manager_legacy { struct radeon_cs_manager base; struct radeon_context *ctx; diff --git a/src/mesa/drivers/dri/r600/r600_context.c b/src/mesa/drivers/dri/r600/r600_context.c index 526d02ed571..78bad8726b2 100644 --- a/src/mesa/drivers/dri/r600/r600_context.c +++ b/src/mesa/drivers/dri/r600/r600_context.c @@ -251,7 +251,7 @@ GLboolean r600CreateContext(const __GLcontextModes * glVisual, r700InitChipObject(r600); /* let the eag... */ r700InitStateFuncs(&functions); - r700InitTextureFuncs(&functions); + r600InitTextureFuncs(&functions); r700InitShaderFuncs(&functions); r700InitIoctlFuncs(&functions); diff --git a/src/mesa/drivers/dri/r600/r600_tex.c b/src/mesa/drivers/dri/r600/r600_tex.c new file mode 100644 index 00000000000..5845c05810b --- /dev/null +++ b/src/mesa/drivers/dri/r600/r600_tex.c @@ -0,0 +1,438 @@ +/* +Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. + +The Weather Channel (TM) funded Tungsten Graphics to develop the +initial release of the Radeon 8500 driver under the XFree86 license. +This notice must be preserved. + +Permission is hereby granted, free of charge, to any person obtaining +a copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sublicense, and/or sell copies of the Software, and to +permit persons to whom the Software is furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice (including the +next paragraph) shall be included in all copies or substantial +portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE +LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION +OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION +WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +/** + * \file + * + * \author Keith Whitwell + */ + +#include "main/glheader.h" +#include "main/imports.h" +#include "main/colormac.h" +#include "main/context.h" +#include "main/enums.h" +#include "main/image.h" +#include "main/mipmap.h" +#include "main/simple_list.h" +#include "main/texformat.h" +#include "main/texstore.h" +#include "main/teximage.h" +#include "main/texobj.h" + +#include "texmem.h" + +#include "r600_context.h" +#include "r700_state.h" +#include "radeon_mipmap_tree.h" +#include "r600_tex.h" + +#include "xmlpool.h" + + +static unsigned int translate_wrap_mode(GLenum wrapmode) +{ + switch(wrapmode) { + case GL_REPEAT: return SQ_TEX_WRAP; + case GL_CLAMP: return SQ_TEX_CLAMP_HALF_BORDER; + case GL_CLAMP_TO_EDGE: return SQ_TEX_CLAMP_LAST_TEXEL; + case GL_CLAMP_TO_BORDER: return SQ_TEX_CLAMP_BORDER; + case GL_MIRRORED_REPEAT: return SQ_TEX_MIRROR_ONCE_HALF_BORDER; + case GL_MIRROR_CLAMP_EXT: return SQ_TEX_MIRROR; + case GL_MIRROR_CLAMP_TO_EDGE_EXT: return SQ_TEX_MIRROR_ONCE_BORDER; + case GL_MIRROR_CLAMP_TO_BORDER_EXT: return SQ_TEX_MIRROR_ONCE_LAST_TEXEL; + default: + _mesa_problem(NULL, "bad wrap mode in %s", __FUNCTION__); + return 0; + } +} + + +/** + * Update the cached hardware registers based on the current texture wrap modes. + * + * \param t Texture object whose wrap modes are to be set + */ +static void r600UpdateTexWrap(radeonTexObjPtr t) +{ + struct gl_texture_object *tObj = &t->base; + + SETfield(t->SQ_TEX_SAMPLER0, translate_wrap_mode(tObj->WrapS), + SQ_TEX_SAMPLER_WORD0_0__CLAMP_X_shift, SQ_TEX_SAMPLER_WORD0_0__CLAMP_X_mask); + + if (tObj->Target != GL_TEXTURE_1D) { + SETfield(t->SQ_TEX_SAMPLER0, translate_wrap_mode(tObj->WrapT), + CLAMP_Y_shift, CLAMP_Y_mask); + + if (tObj->Target == GL_TEXTURE_3D) + SETfield(t->SQ_TEX_SAMPLER0, translate_wrap_mode(tObj->WrapR), + CLAMP_Z_shift, CLAMP_Z_mask); + } +} + +static void r600SetTexDefaultState(radeonTexObjPtr t) +{ + /* Init text object to default states. */ + t->SQ_TEX_RESOURCE0 = 0; + SETfield(t->SQ_TEX_RESOURCE0, SQ_TEX_DIM_2D, DIM_shift, DIM_mask); + SETfield(t->SQ_TEX_RESOURCE0, ARRAY_LINEAR_GENERAL, + SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_shift, SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_mask); + CLEARbit(t->SQ_TEX_RESOURCE0, TILE_TYPE_bit); + + t->SQ_TEX_RESOURCE1 = 0; + SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE2 = 0; + t->SQ_TEX_RESOURCE3 = 0; + + t->SQ_TEX_RESOURCE4 = 0; + SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED, + FORMAT_COMP_X_shift, FORMAT_COMP_X_mask); + SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED, + FORMAT_COMP_Y_shift, FORMAT_COMP_Y_mask); + SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED, + FORMAT_COMP_Z_shift, FORMAT_COMP_Z_mask); + SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED, + FORMAT_COMP_W_shift, FORMAT_COMP_W_mask); + SETfield(t->SQ_TEX_RESOURCE4, SQ_NUM_FORMAT_NORM, + SQ_TEX_RESOURCE_WORD4_0__NUM_FORMAT_ALL_shift, SQ_TEX_RESOURCE_WORD4_0__NUM_FORMAT_ALL_mask); + CLEARbit(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__SRF_MODE_ALL_bit); + CLEARbit(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit); + SETfield(t->SQ_TEX_RESOURCE4, SQ_ENDIAN_NONE, + SQ_TEX_RESOURCE_WORD4_0__ENDIAN_SWAP_shift, SQ_TEX_RESOURCE_WORD4_0__ENDIAN_SWAP_mask); + SETfield(t->SQ_TEX_RESOURCE4, 1, REQUEST_SIZE_shift, REQUEST_SIZE_mask); + t->SQ_TEX_RESOURCE4 |= SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift + |SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift + |SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift + |SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift; + SETfield(t->SQ_TEX_RESOURCE4, 0, BASE_LEVEL_shift, BASE_LEVEL_mask); /* mip-maps */ + + t->SQ_TEX_RESOURCE5 = 0; + t->SQ_TEX_RESOURCE6 = 0; + + SETfield(t->SQ_TEX_RESOURCE6, SQ_TEX_VTX_VALID_TEXTURE, + SQ_TEX_RESOURCE_WORD6_0__TYPE_shift, SQ_TEX_RESOURCE_WORD6_0__TYPE_mask); + + /* Initialize sampler registers */ + t->SQ_TEX_SAMPLER0 = 0; + t->SQ_TEX_SAMPLER0 |= + SQ_TEX_WRAP << SQ_TEX_SAMPLER_WORD0_0__CLAMP_X_shift + |SQ_TEX_WRAP << CLAMP_Y_shift + |SQ_TEX_WRAP << CLAMP_Z_shift + |SQ_TEX_XY_FILTER_POINT << XY_MAG_FILTER_shift + |SQ_TEX_XY_FILTER_POINT << XY_MIN_FILTER_shift + |SQ_TEX_Z_FILTER_NONE << Z_FILTER_shift + |SQ_TEX_Z_FILTER_NONE << MIP_FILTER_shift + |SQ_TEX_BORDER_COLOR_TRANS_BLACK << BORDER_COLOR_TYPE_shift; + + t->SQ_TEX_SAMPLER1 = 0x7FF << MAX_LOD_shift; + + t->SQ_TEX_SAMPLER2 = 0; + SETbit(t->SQ_TEX_SAMPLER2, SQ_TEX_SAMPLER_WORD2_0__TYPE_bit); +} + + +static GLuint aniso_filter(GLfloat anisotropy) +{ +#if 0 + if (anisotropy >= 16.0) { + return R300_TX_MAX_ANISO_16_TO_1; + } else if (anisotropy >= 8.0) { + return R300_TX_MAX_ANISO_8_TO_1; + } else if (anisotropy >= 4.0) { + return R300_TX_MAX_ANISO_4_TO_1; + } else if (anisotropy >= 2.0) { + return R300_TX_MAX_ANISO_2_TO_1; + } else { + return R300_TX_MAX_ANISO_1_TO_1; + } +#endif + return 0; +} + +/** + * Set the texture magnification and minification modes. + * + * \param t Texture whose filter modes are to be set + * \param minf Texture minification mode + * \param magf Texture magnification mode + * \param anisotropy Maximum anisotropy level + */ +static void r600SetTexFilter(radeonTexObjPtr t, GLenum minf, GLenum magf, GLfloat anisotropy) +{ + /* Force revalidation to account for switches from/to mipmapping. */ + t->validated = GL_FALSE; + + /* Note that EXT_texture_filter_anisotropic is extremely vague about + * how anisotropic filtering interacts with the "normal" filter modes. + * When anisotropic filtering is enabled, we override min and mag + * filter settings completely. This includes driconf's settings. + */ + if (anisotropy >= 2.0 && (minf != GL_NEAREST) && (magf != GL_NEAREST)) { + /*t->pp_txfilter |= R300_TX_MAG_FILTER_ANISO + | R300_TX_MIN_FILTER_ANISO + | R300_TX_MIN_FILTER_MIP_LINEAR + | aniso_filter(anisotropy);*/ + if (RADEON_DEBUG & DEBUG_TEXTURE) + fprintf(stderr, "Using maximum anisotropy of %f\n", anisotropy); + return; + } + + switch (minf) { + case GL_NEAREST: + SETfield(t->SQ_TEX_SAMPLER0, TEX_XYFilter_Point, + XY_MIN_FILTER_shift, XY_MIN_FILTER_mask); + SETfield(t->SQ_TEX_SAMPLER0, TEX_MipFilter_None, + MIP_FILTER_shift, MIP_FILTER_mask); + break; + case GL_LINEAR: + SETfield(t->SQ_TEX_SAMPLER0, TEX_XYFilter_Linear, + XY_MIN_FILTER_shift, XY_MIN_FILTER_mask); + SETfield(t->SQ_TEX_SAMPLER0, TEX_MipFilter_None, + MIP_FILTER_shift, MIP_FILTER_mask); + break; + case GL_NEAREST_MIPMAP_NEAREST: + SETfield(t->SQ_TEX_SAMPLER0, TEX_XYFilter_Point, + XY_MIN_FILTER_shift, XY_MIN_FILTER_mask); + SETfield(t->SQ_TEX_SAMPLER0, TEX_MipFilter_Point, + MIP_FILTER_shift, MIP_FILTER_mask); + break; + case GL_NEAREST_MIPMAP_LINEAR: + SETfield(t->SQ_TEX_SAMPLER0, TEX_XYFilter_Point, + XY_MIN_FILTER_shift, XY_MIN_FILTER_mask); + SETfield(t->SQ_TEX_SAMPLER0, TEX_MipFilter_Linear, + MIP_FILTER_shift, MIP_FILTER_mask); + break; + case GL_LINEAR_MIPMAP_NEAREST: + SETfield(t->SQ_TEX_SAMPLER0, TEX_XYFilter_Linear, + XY_MIN_FILTER_shift, XY_MIN_FILTER_mask); + SETfield(t->SQ_TEX_SAMPLER0, TEX_MipFilter_Point, + MIP_FILTER_shift, MIP_FILTER_mask); + break; + case GL_LINEAR_MIPMAP_LINEAR: + SETfield(t->SQ_TEX_SAMPLER0, TEX_XYFilter_Linear, + XY_MIN_FILTER_shift, XY_MIN_FILTER_mask); + SETfield(t->SQ_TEX_SAMPLER0, TEX_MipFilter_Linear, + MIP_FILTER_shift, MIP_FILTER_mask); + break; + } + + /* Note we don't have 3D mipmaps so only use the mag filter setting + * to set the 3D texture filter mode. + */ + switch (magf) { + case GL_NEAREST: + SETfield(t->SQ_TEX_SAMPLER0, TEX_XYFilter_Point, + XY_MAG_FILTER_shift, XY_MAG_FILTER_mask); + break; + case GL_LINEAR: + SETfield(t->SQ_TEX_SAMPLER0, TEX_XYFilter_Linear, + XY_MAG_FILTER_shift, XY_MAG_FILTER_mask); + break; + } +} + +static void r600SetTexBorderColor(radeonTexObjPtr t, const GLfloat color[4]) +{ +#if 0 + GLubyte c[4]; + CLAMPED_FLOAT_TO_UBYTE(c[0], color[0]); + CLAMPED_FLOAT_TO_UBYTE(c[1], color[1]); + CLAMPED_FLOAT_TO_UBYTE(c[2], color[2]); + CLAMPED_FLOAT_TO_UBYTE(c[3], color[3]); + t->pp_border_color = PACK_COLOR_8888(c[3], c[0], c[1], c[2]); +#endif +} + +/** + * Changes variables and flags for a state update, which will happen at the + * next UpdateTextureState + */ + +static void r600TexParameter(GLcontext * ctx, GLenum target, + struct gl_texture_object *texObj, + GLenum pname, const GLfloat * params) +{ + radeonTexObj* t = radeon_tex_obj(texObj); + + if (RADEON_DEBUG & (DEBUG_STATE | DEBUG_TEXTURE)) { + fprintf(stderr, "%s( %s )\n", __FUNCTION__, + _mesa_lookup_enum_by_nr(pname)); + } + + switch (pname) { + case GL_TEXTURE_MIN_FILTER: + case GL_TEXTURE_MAG_FILTER: + case GL_TEXTURE_MAX_ANISOTROPY_EXT: + r600SetTexFilter(t, texObj->MinFilter, texObj->MagFilter, texObj->MaxAnisotropy); + break; + + case GL_TEXTURE_WRAP_S: + case GL_TEXTURE_WRAP_T: + case GL_TEXTURE_WRAP_R: + r600UpdateTexWrap(t); + break; + + case GL_TEXTURE_BORDER_COLOR: + r600SetTexBorderColor(t, texObj->BorderColor); + break; + + case GL_TEXTURE_BASE_LEVEL: + case GL_TEXTURE_MAX_LEVEL: + case GL_TEXTURE_MIN_LOD: + case GL_TEXTURE_MAX_LOD: + /* This isn't the most efficient solution but there doesn't appear to + * be a nice alternative. Since there's no LOD clamping, + * we just have to rely on loading the right subset of mipmap levels + * to simulate a clamped LOD. + */ + if (t->mt) { + radeon_miptree_unreference(t->mt); + t->mt = 0; + t->validated = GL_FALSE; + } + break; + + case GL_DEPTH_TEXTURE_MODE: + if (!texObj->Image[0][texObj->BaseLevel]) + return; + if (texObj->Image[0][texObj->BaseLevel]->TexFormat->BaseFormat + == GL_DEPTH_COMPONENT) { + r600SetDepthTexMode(texObj); + break; + } else { + /* If the texture isn't a depth texture, changing this + * state won't cause any changes to the hardware. + * Don't force a flush of texture state. + */ + return; + } + + default: + return; + } +} + +static void r600DeleteTexture(GLcontext * ctx, struct gl_texture_object *texObj) +{ + context_t* rmesa = R700_CONTEXT(ctx); + radeonTexObj* t = radeon_tex_obj(texObj); + + if (RADEON_DEBUG & (DEBUG_STATE | DEBUG_TEXTURE)) { + fprintf(stderr, "%s( %p (target = %s) )\n", __FUNCTION__, + (void *)texObj, + _mesa_lookup_enum_by_nr(texObj->Target)); + } + + if (rmesa) { + // fixme + int i; + //radeon_firevertices(&rmesa->radeon); + + for(i = 0; i < R700_MAX_TEXTURE_UNITS; ++i) + if (rmesa->hw.textures[i] == t) + rmesa->hw.textures[i] = 0; + } + + if (t->bo) { + radeon_bo_unref(t->bo); + t->bo = NULL; + } + + if (t->mt) { + radeon_miptree_unreference(t->mt); + t->mt = 0; + } + _mesa_delete_texture_object(ctx, texObj); +} + +/** + * Allocate a new texture object. + * Called via ctx->Driver.NewTextureObject. + * Note: this function will be called during context creation to + * allocate the default texture objects. + * Fixup MaxAnisotropy according to user preference. + */ +static struct gl_texture_object *r600NewTextureObject(GLcontext * ctx, + GLuint name, + GLenum target) +{ + context_t* rmesa = R700_CONTEXT(ctx); + radeonTexObj* t = CALLOC_STRUCT(radeon_tex_obj); + + + if (RADEON_DEBUG & (DEBUG_STATE | DEBUG_TEXTURE)) { + fprintf(stderr, "%s( %p (target = %s) )\n", __FUNCTION__, + t, _mesa_lookup_enum_by_nr(target)); + } + + _mesa_initialize_texture_object(&t->base, name, target); + t->base.MaxAnisotropy = rmesa->radeon.initialMaxAnisotropy; + + /* Initialize hardware state */ + r600SetTexDefaultState(t); + r600UpdateTexWrap(t); + r600SetTexFilter(t, t->base.MinFilter, t->base.MagFilter, t->base.MaxAnisotropy); + r600SetTexBorderColor(t, t->base.BorderColor); + + return &t->base; +} + +void r600InitTextureFuncs(struct dd_function_table *functions) +{ + /* Note: we only plug in the functions we implement in the driver + * since _mesa_init_driver_functions() was already called. + */ + functions->NewTextureImage = radeonNewTextureImage; + functions->FreeTexImageData = radeonFreeTexImageData; + functions->MapTexture = radeonMapTexture; + functions->UnmapTexture = radeonUnmapTexture; + + functions->ChooseTextureFormat = radeonChooseTextureFormat_mesa; + functions->TexImage1D = radeonTexImage1D; + functions->TexImage2D = radeonTexImage2D; + functions->TexImage3D = radeonTexImage3D; + functions->TexSubImage1D = radeonTexSubImage1D; + functions->TexSubImage2D = radeonTexSubImage2D; + functions->TexSubImage3D = radeonTexSubImage3D; + functions->GetTexImage = radeonGetTexImage; + functions->GetCompressedTexImage = radeonGetCompressedTexImage; + functions->NewTextureObject = r600NewTextureObject; + functions->DeleteTexture = r600DeleteTexture; + functions->IsTextureResident = driIsTextureResident; + + functions->TexParameter = r600TexParameter; + + functions->CompressedTexImage2D = radeonCompressedTexImage2D; + functions->CompressedTexSubImage2D = radeonCompressedTexSubImage2D; + + functions->GenerateMipmap = radeonGenerateMipmap; + + driInitTextureFormats(); +} diff --git a/src/mesa/drivers/dri/r600/r600_tex.h b/src/mesa/drivers/dri/r600/r600_tex.h new file mode 100644 index 00000000000..fb0e1a023e1 --- /dev/null +++ b/src/mesa/drivers/dri/r600/r600_tex.h @@ -0,0 +1,63 @@ +/* +Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. + +The Weather Channel (TM) funded Tungsten Graphics to develop the +initial release of the Radeon 8500 driver under the XFree86 license. +This notice must be preserved. + +Permission is hereby granted, free of charge, to any person obtaining +a copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sublicense, and/or sell copies of the Software, and to +permit persons to whom the Software is furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice (including the +next paragraph) shall be included in all copies or substantial +portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE +LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION +OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION +WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Keith Whitwell + */ + +#ifndef __r600_TEX_H__ +#define __r600_TEX_H__ + +/* TODO : review this after texture load code. */ +#define R700_BLIT_WIDTH_BYTES 1024 +/* The BASE_ADDRESS and MIP_ADDRESS fields are 256-byte-aligned */ +#define R700_TEXTURE_ALIGNMENT_MASK 0x255 +/* Texel pitch is 8 alignment. */ +#define R700_TEXEL_PITCH_ALIGNMENT_MASK 0x7 + +#define R700_MAX_TEXTURE_UNITS 8 /* TODO : should be 16, lets make it work, review later */ + +extern void r600SetDepthTexMode(struct gl_texture_object *tObj); + +extern void r600SetTexBuffer(__DRIcontext *pDRICtx, GLint target, + __DRIdrawable *dPriv); + +extern void r600SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, + GLint format, __DRIdrawable *dPriv); + +extern void r600SetTexOffset(__DRIcontext *pDRICtx, GLint texname, + unsigned long long offset, GLint depth, + GLuint pitch); + +extern GLboolean r600ValidateBuffers(GLcontext * ctx); + +extern void r600InitTextureFuncs(struct dd_function_table *functions); + +#endif /* __r600_TEX_H__ */ diff --git a/src/mesa/drivers/dri/r600/r600_texstate.c b/src/mesa/drivers/dri/r600/r600_texstate.c new file mode 100644 index 00000000000..5a249d4f14f --- /dev/null +++ b/src/mesa/drivers/dri/r600/r600_texstate.c @@ -0,0 +1,795 @@ +/* +Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. + +The Weather Channel (TM) funded Tungsten Graphics to develop the +initial release of the Radeon 8500 driver under the XFree86 license. +This notice must be preserved. + +Permission is hereby granted, free of charge, to any person obtaining +a copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sublicense, and/or sell copies of the Software, and to +permit persons to whom the Software is furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice (including the +next paragraph) shall be included in all copies or substantial +portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE +LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION +OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION +WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/** + * \file + * + * \author Keith Whitwell + * + * \todo Enable R300 texture tiling code? + */ + +#include "main/glheader.h" +#include "main/imports.h" +#include "main/context.h" +#include "main/macros.h" +#include "main/texformat.h" +#include "main/teximage.h" +#include "main/texobj.h" +#include "main/enums.h" + +#include "r600_context.h" +#include "r700_state.h" +#include "radeon_mipmap_tree.h" +#include "r600_tex.h" + +void r600UpdateTextureState(GLcontext * ctx) +{ + context_t *context = R700_CONTEXT(ctx); + R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw); + struct gl_texture_unit *texUnit; + struct radeon_tex_obj *t; + GLuint unit; + + for (unit = 0; unit < R700_MAX_TEXTURE_UNITS; unit++) { + texUnit = &ctx->Texture.Unit[unit]; + t = radeon_tex_obj(ctx->Texture.Unit[unit]._Current); + + if (texUnit->_ReallyEnabled) { + if (!t) + continue; + r700->textures[unit] = t; + } + } +} + +static GLboolean r600GetTexFormat(struct gl_texture_object *tObj, GLuint mesa_format) +{ + radeonTexObj *t = radeon_tex_obj(tObj); + + t->SQ_TEX_RESOURCE4 &= ~( SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask + |SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask + |SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask + |SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask ); + + switch (mesa_format) /* This is mesa format. */ + { + case MESA_FORMAT_RGBA8888: + SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_RGBA8888_REV: + SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_ARGB8888: + SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_ARGB8888_REV: + SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_RGB888: + SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_1 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_RGB565: + SETfield(t->SQ_TEX_RESOURCE1, FMT_5_6_5, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_1 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_RGB565_REV: + SETfield(t->SQ_TEX_RESOURCE1, FMT_5_6_5, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_1 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_ARGB4444: + SETfield(t->SQ_TEX_RESOURCE1, FMT_4_4_4_4, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_ARGB4444_REV: + SETfield(t->SQ_TEX_RESOURCE1, FMT_4_4_4_4, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_ARGB1555: + SETfield(t->SQ_TEX_RESOURCE1, FMT_1_5_5_5, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_ARGB1555_REV: + SETfield(t->SQ_TEX_RESOURCE1, FMT_1_5_5_5, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_AL88: + case MESA_FORMAT_AL88_REV: /* TODO : Check this. */ + SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_RGB332: + SETfield(t->SQ_TEX_RESOURCE1, FMT_3_3_2, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_1 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_A8: /* ZERO, ZERO, ZERO, X */ + SETfield(t->SQ_TEX_RESOURCE1, FMT_8, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_0 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_0 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_0 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_L8: /* X, X, X, ONE */ + SETfield(t->SQ_TEX_RESOURCE1, FMT_8, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_1 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_I8: /* X, X, X, X */ + case MESA_FORMAT_CI8: + SETfield(t->SQ_TEX_RESOURCE1, FMT_8, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + /* YUV422 TODO conversion */ /* X, Y, Z, ONE, G8R8_G8B8 */ + /* + case MESA_FORMAT_YCBCR: + t->SQ_TEX_RESOURCE1.bitfields.DATA_FORMAT = ; + break; + */ + /* VUY422 TODO conversion */ /* X, Y, Z, ONE, G8R8_G8B8 */ + /* + case MESA_FORMAT_YCBCR_REV: + t->SQ_TEX_RESOURCE1.bitfields.DATA_FORMAT = ; + break; + */ + case MESA_FORMAT_RGB_DXT1: /* not supported yet */ + + break; + case MESA_FORMAT_RGBA_DXT1: /* not supported yet */ + + break; + case MESA_FORMAT_RGBA_DXT3: /* not supported yet */ + + break; + case MESA_FORMAT_RGBA_DXT5: /* not supported yet */ + + break; + case MESA_FORMAT_RGBA_FLOAT32: + SETfield(t->SQ_TEX_RESOURCE1, FMT_32_32_32_32_FLOAT, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_RGBA_FLOAT16: + SETfield(t->SQ_TEX_RESOURCE1, FMT_16_16_16_16_FLOAT, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_RGB_FLOAT32: /* X, Y, Z, ONE */ + SETfield(t->SQ_TEX_RESOURCE1, FMT_32_32_32_FLOAT, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_1 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_RGB_FLOAT16: + SETfield(t->SQ_TEX_RESOURCE1, FMT_16_16_16_FLOAT, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_1 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_ALPHA_FLOAT32: /* ZERO, ZERO, ZERO, X */ + SETfield(t->SQ_TEX_RESOURCE1, FMT_32_FLOAT, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_0 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_0 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_0 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_ALPHA_FLOAT16: /* ZERO, ZERO, ZERO, X */ + SETfield(t->SQ_TEX_RESOURCE1, FMT_16_FLOAT, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_0 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_0 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_0 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_LUMINANCE_FLOAT32: /* X, X, X, ONE */ + SETfield(t->SQ_TEX_RESOURCE1, FMT_32_FLOAT, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_1 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_LUMINANCE_FLOAT16: /* X, X, X, ONE */ + SETfield(t->SQ_TEX_RESOURCE1, FMT_16_FLOAT, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_1 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32: + SETfield(t->SQ_TEX_RESOURCE1, FMT_32_32_FLOAT, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT16: + SETfield(t->SQ_TEX_RESOURCE1, FMT_16_16_FLOAT, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_INTENSITY_FLOAT32: /* X, X, X, X */ + SETfield(t->SQ_TEX_RESOURCE1, FMT_32_FLOAT, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_INTENSITY_FLOAT16: /* X, X, X, X */ + SETfield(t->SQ_TEX_RESOURCE1, FMT_16_FLOAT, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case MESA_FORMAT_Z16: + case MESA_FORMAT_Z24_S8: + case MESA_FORMAT_Z32: + switch (mesa_format) { + case MESA_FORMAT_Z16: + SETfield(t->SQ_TEX_RESOURCE1, FMT_16, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + break; + case MESA_FORMAT_Z24_S8: + SETfield(t->SQ_TEX_RESOURCE1, FMT_24_8, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + break; + case MESA_FORMAT_Z32: + SETfield(t->SQ_TEX_RESOURCE1, FMT_32, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + break; + }; + switch (tObj->DepthMode) { + case GL_LUMINANCE: /* X, X, X, ONE */ + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_1 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case GL_INTENSITY: /* X, X, X, X */ + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + case GL_ALPHA: /* ZERO, ZERO, ZERO, X */ + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_0 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_0 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_0 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + break; + default: + return GL_FALSE; + } + break; + default: + /* Not supported format */ + return GL_FALSE; + }; + + return GL_TRUE; +} + +void r600SetDepthTexMode(struct gl_texture_object *tObj) +{ + const GLuint *format; + radeonTexObjPtr t; + + if (!tObj) + return; + + t = radeon_tex_obj(tObj); + + r600GetTexFormat(tObj, tObj->Image[0][tObj->BaseLevel]->TexFormat->MesaFormat); + +} + +/** + * Compute the cached hardware register values for the given texture object. + * + * \param rmesa Context pointer + * \param t the r300 texture object + */ +static void setup_hardware_state(context_t *rmesa, struct gl_texture_object *texObj) +{ + radeonTexObj *t = radeon_tex_obj(texObj); + const struct gl_texture_image *firstImage; + int firstlevel = t->mt ? t->mt->firstLevel : 0; + GLuint uTexelPitch; + + firstImage = t->base.Image[0][firstlevel]; + + if (!t->image_override) { + if (!r600GetTexFormat(texObj, firstImage->TexFormat->MesaFormat)) { + _mesa_problem(NULL, "unexpected texture format in %s", + __FUNCTION__); + return; + } + } + + if (t->image_override && t->bo) + return; + + switch (texObj->Target) { + case GL_TEXTURE_1D: + SETfield(t->SQ_TEX_RESOURCE0, SQ_TEX_DIM_1D, DIM_shift, DIM_mask); + SETfield(t->SQ_TEX_RESOURCE1, 0, TEX_DEPTH_shift, TEX_DEPTH_mask); + break; + case GL_TEXTURE_2D: + case GL_TEXTURE_RECTANGLE_NV: + SETfield(t->SQ_TEX_RESOURCE0, SQ_TEX_DIM_2D, DIM_shift, DIM_mask); + SETfield(t->SQ_TEX_RESOURCE1, 0, TEX_DEPTH_shift, TEX_DEPTH_mask); + break; + case GL_TEXTURE_3D: + SETfield(t->SQ_TEX_RESOURCE0, SQ_TEX_DIM_3D, DIM_shift, DIM_mask); + SETfield(t->SQ_TEX_RESOURCE1, firstImage->Depth - 1, // ??? + TEX_DEPTH_shift, TEX_DEPTH_mask); + break; + case GL_TEXTURE_CUBE_MAP: + SETfield(t->SQ_TEX_RESOURCE0, SQ_TEX_DIM_CUBEMAP, DIM_shift, DIM_mask); + SETfield(t->SQ_TEX_RESOURCE1, 0, TEX_DEPTH_shift, TEX_DEPTH_mask); + break; + default: + _mesa_problem(NULL, "unexpected texture target type in %s", __FUNCTION__); + return; + } + + uTexelPitch = (firstImage->Width + R700_TEXEL_PITCH_ALIGNMENT_MASK) + & ~R700_TEXEL_PITCH_ALIGNMENT_MASK; + + SETfield(t->SQ_TEX_RESOURCE0, (uTexelPitch/8)-1, PITCH_shift, PITCH_mask); + SETfield(t->SQ_TEX_RESOURCE0, firstImage->Width - 1, + TEX_WIDTH_shift, TEX_WIDTH_mask); + SETfield(t->SQ_TEX_RESOURCE1, firstImage->Height - 1, + TEX_HEIGHT_shift, TEX_HEIGHT_mask); + +} + +/** + * Ensure the given texture is ready for rendering. + * + * Mostly this means populating the texture object's mipmap tree. + */ +static GLboolean r600_validate_texture(GLcontext * ctx, struct gl_texture_object *texObj) +{ + context_t *rmesa = R700_CONTEXT(ctx); + radeonTexObj *t = radeon_tex_obj(texObj); + + if (!radeon_validate_texture_miptree(ctx, texObj)) + return GL_FALSE; + + /* Configure the hardware registers (more precisely, the cached version + * of the hardware registers). */ + setup_hardware_state(rmesa, texObj); + + t->validated = GL_TRUE; + return GL_TRUE; +} + +/** + * Ensure all enabled and complete textures are uploaded along with any buffers being used. + */ +GLboolean r600ValidateBuffers(GLcontext * ctx) +{ + context_t *rmesa = R700_CONTEXT(ctx); + struct radeon_renderbuffer *rrb; + int i; + + radeon_validate_reset_bos(&rmesa->radeon); + + rrb = radeon_get_colorbuffer(&rmesa->radeon); + /* color buffer */ + if (rrb && rrb->bo) { + radeon_validate_bo(&rmesa->radeon, rrb->bo, + 0, RADEON_GEM_DOMAIN_VRAM); + } + + /* depth buffer */ + rrb = radeon_get_depthbuffer(&rmesa->radeon); + if (rrb && rrb->bo) { + radeon_validate_bo(&rmesa->radeon, rrb->bo, + 0, RADEON_GEM_DOMAIN_VRAM); + } + + for (i = 0; i < ctx->Const.MaxTextureImageUnits; ++i) { + radeonTexObj *t; + + if (!ctx->Texture.Unit[i]._ReallyEnabled) + continue; + + if (!r600_validate_texture(ctx, ctx->Texture.Unit[i]._Current)) { + _mesa_warning(ctx, + "failed to validate texture for unit %d.\n", + i); + } + t = radeon_tex_obj(ctx->Texture.Unit[i]._Current); + if (t->image_override && t->bo) + radeon_validate_bo(&rmesa->radeon, t->bo, + RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0); + + else if (t->mt->bo) + radeon_validate_bo(&rmesa->radeon, t->mt->bo, + RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0); + } + if (rmesa->radeon.dma.current) + radeon_validate_bo(&rmesa->radeon, rmesa->radeon.dma.current, RADEON_GEM_DOMAIN_GTT, 0); + + return radeon_revalidate_bos(ctx); +} + +void r600SetTexOffset(__DRIcontext * pDRICtx, GLint texname, + unsigned long long offset, GLint depth, GLuint pitch) +{ + context_t *rmesa = pDRICtx->driverPrivate; + struct gl_texture_object *tObj = + _mesa_lookup_texture(rmesa->radeon.glCtx, texname); + radeonTexObjPtr t = radeon_tex_obj(tObj); + uint32_t pitch_val; + + if (!tObj) + return; + + t->image_override = GL_TRUE; + + if (!offset) + return; + + t->bo = NULL; + t->override_offset = offset; + pitch_val = pitch; + switch (depth) { + case 32: + SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + pitch_val /= 4; + break; + case 24: + default: + SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_1 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + pitch_val /= 4; + break; + case 16: + SETfield(t->SQ_TEX_RESOURCE1, FMT_5_6_5, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_1 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + pitch_val /= 2; + break; + } + + pitch_val = (pitch_val + R700_TEXEL_PITCH_ALIGNMENT_MASK) + & ~R700_TEXEL_PITCH_ALIGNMENT_MASK; + SETfield(t->SQ_TEX_RESOURCE0, (pitch_val/8)-1, PITCH_shift, PITCH_mask); +} + +void r600SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_format, __DRIdrawable *dPriv) +{ + struct gl_texture_unit *texUnit; + struct gl_texture_object *texObj; + struct gl_texture_image *texImage; + struct radeon_renderbuffer *rb; + radeon_texture_image *rImage; + radeonContextPtr radeon; + context_t *rmesa; + struct radeon_framebuffer *rfb; + radeonTexObjPtr t; + uint32_t pitch_val; + uint32_t internalFormat, type, format; + + type = GL_BGRA; + format = GL_UNSIGNED_BYTE; + internalFormat = (glx_texture_format == GLX_TEXTURE_FORMAT_RGB_EXT ? 3 : 4); + + radeon = pDRICtx->driverPrivate; + rmesa = pDRICtx->driverPrivate; + + rfb = dPriv->driverPrivate; + texUnit = &radeon->glCtx->Texture.Unit[radeon->glCtx->Texture.CurrentUnit]; + texObj = _mesa_select_tex_object(radeon->glCtx, texUnit, target); + texImage = _mesa_get_tex_image(radeon->glCtx, texObj, target, 0); + + rImage = get_radeon_texture_image(texImage); + t = radeon_tex_obj(texObj); + if (t == NULL) { + return; + } + + radeon_update_renderbuffers(pDRICtx, dPriv); + /* back & depth buffer are useless free them right away */ + rb = (void*)rfb->base.Attachment[BUFFER_DEPTH].Renderbuffer; + if (rb && rb->bo) { + radeon_bo_unref(rb->bo); + rb->bo = NULL; + } + rb = (void*)rfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer; + if (rb && rb->bo) { + radeon_bo_unref(rb->bo); + rb->bo = NULL; + } + rb = rfb->color_rb[0]; + if (rb->bo == NULL) { + /* Failed to BO for the buffer */ + return; + } + + _mesa_lock_texture(radeon->glCtx, texObj); + if (t->bo) { + radeon_bo_unref(t->bo); + t->bo = NULL; + } + if (rImage->bo) { + radeon_bo_unref(rImage->bo); + rImage->bo = NULL; + } + if (t->mt) { + radeon_miptree_unreference(t->mt); + t->mt = NULL; + } + if (rImage->mt) { + radeon_miptree_unreference(rImage->mt); + rImage->mt = NULL; + } + _mesa_init_teximage_fields(radeon->glCtx, target, texImage, + rb->width, rb->height, 1, 0, rb->cpp); + texImage->RowStride = rb->pitch / rb->cpp; + texImage->TexFormat = radeonChooseTextureFormat(radeon->glCtx, + internalFormat, + type, format, 0); + rImage->bo = rb->bo; + radeon_bo_ref(rImage->bo); + t->bo = rb->bo; + radeon_bo_ref(t->bo); + t->image_override = GL_TRUE; + t->override_offset = 0; + pitch_val = rb->pitch; + switch (rb->cpp) { + case 4: + if (glx_texture_format == GLX_TEXTURE_FORMAT_RGB_EXT) { + SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_1 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + } else { + SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + } + pitch_val /= 4; + break; + case 3: + default: + // FMT_8_8_8 ??? + SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_1 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + pitch_val /= 4; + break; + case 2: + SETfield(t->SQ_TEX_RESOURCE1, FMT_5_6_5, + SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); + + t->SQ_TEX_RESOURCE4 |= + (SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) + |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) + |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) + |(SQ_SEL_1 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); + pitch_val /= 2; + break; + } + + pitch_val = (pitch_val + R700_TEXEL_PITCH_ALIGNMENT_MASK) + & ~R700_TEXEL_PITCH_ALIGNMENT_MASK; + + SETfield(t->SQ_TEX_RESOURCE0, (pitch_val/8)-1, PITCH_shift, PITCH_mask); + SETfield(t->SQ_TEX_RESOURCE0, rb->width - 1, + TEX_WIDTH_shift, TEX_WIDTH_mask); + SETfield(t->SQ_TEX_RESOURCE1, rb->height - 1, + TEX_HEIGHT_shift, TEX_HEIGHT_mask); + + t->validated = GL_TRUE; + _mesa_unlock_texture(radeon->glCtx, texObj); + return; +} + +void r600SetTexBuffer(__DRIcontext *pDRICtx, GLint target, __DRIdrawable *dPriv) +{ + r600SetTexBuffer2(pDRICtx, target, GLX_TEXTURE_FORMAT_RGBA_EXT, dPriv); +} diff --git a/src/mesa/drivers/dri/r600/r700_chip.c b/src/mesa/drivers/dri/r600/r700_chip.c index 4ace9c946b8..ae380d83fcd 100644 --- a/src/mesa/drivers/dri/r600/r700_chip.c +++ b/src/mesa/drivers/dri/r600/r700_chip.c @@ -32,7 +32,7 @@ #include "r600_cmdbuf.h" #include "r700_state.h" -#include "r700_tex.h" +#include "r600_tex.h" #include "r700_oglprog.h" #include "r700_fragprog.h" #include "r700_vertprog.h" diff --git a/src/mesa/drivers/dri/r600/r700_chip.h b/src/mesa/drivers/dri/r600/r700_chip.h index fc38e96cb75..41654fd5639 100644 --- a/src/mesa/drivers/dri/r600/r700_chip.h +++ b/src/mesa/drivers/dri/r600/r700_chip.h @@ -148,6 +148,7 @@ union UINT_FLOAT float f32All; }; +#if 0 typedef struct _TEXTURE_STATE_STRUCT { union UINT_FLOAT SQ_TEX_RESOURCE0; @@ -173,6 +174,7 @@ typedef struct _R700_TEXTURE_STATES TEXTURE_STATE_STRUCT *textures[R700_TEXTURE_NUMBERUNITS]; SAMPLER_STATE_STRUCT *samplers[R700_TEXTURE_NUMBERUNITS]; } R700_TEXTURE_STATES; +#endif typedef struct _RENDER_TARGET_STATE_STRUCT { @@ -506,7 +508,7 @@ typedef struct _R700_CHIP_CONTEXT ContextState* pStateList; - R700_TEXTURE_STATES texture_states; + radeonTexObj* textures[R700_TEXTURE_NUMBERUNITS]; GLboolean bEnablePerspective; diff --git a/src/mesa/drivers/dri/r600/r700_render.c b/src/mesa/drivers/dri/r600/r700_render.c index a1ad929a67b..b29a1aa9180 100644 --- a/src/mesa/drivers/dri/r600/r700_render.c +++ b/src/mesa/drivers/dri/r600/r700_render.c @@ -44,10 +44,11 @@ #include "tnl/t_vertex.h" #include "tnl/t_pipeline.h" +#include "radeon_mipmap_tree.h" #include "r600_context.h" #include "r600_cmdbuf.h" -#include "r700_tex.h" +#include "r600_tex.h" #include "r700_vertprog.h" #include "r700_fragprog.h" @@ -131,36 +132,46 @@ static GLboolean r700SetupShaders(GLcontext * ctx) GLboolean r700SendTextureState(context_t *context) { unsigned int i; - R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw); -#if 0 /* to be enabled */ - for(i=0; itexture_states.textures[i] != 0) - { - R700_CMDBUF_CHECK_SPACE(9); - R700EP3 (context, IT_SET_RESOURCE, 7); - R700E32 (context, i * 7); - R700E32 (context, r700->texture_states.textures[i]->SQ_TEX_RESOURCE0.u32All); - R700E32 (context, r700->texture_states.textures[i]->SQ_TEX_RESOURCE1.u32All); - R700E32 (context, r700->texture_states.textures[i]->SQ_TEX_RESOURCE2.u32All); - R700E32 (context, r700->texture_states.textures[i]->SQ_TEX_RESOURCE3.u32All); - R700E32 (context, r700->texture_states.textures[i]->SQ_TEX_RESOURCE4.u32All); - R700E32 (context, r700->texture_states.textures[i]->SQ_TEX_RESOURCE5.u32All); - R700E32 (context, r700->texture_states.textures[i]->SQ_TEX_RESOURCE6.u32All); - } + offset_modifiers offset_mod = {NO_SHIFT, 0, 0xFFFFFFFF}; + struct radeon_bo *bo = NULL; + BATCH_LOCALS(&context->radeon); - if(r700->texture_states.samplers[i] != 0) - { - R700_CMDBUF_CHECK_SPACE(5); - R700EP3 (context, IT_SET_SAMPLER, 3); - R700E32 (context, i * 3); // Base at 0x7000 - R700E32 (context, r700->texture_states.samplers[i]->SQ_TEX_SAMPLER0.u32All); - R700E32 (context, r700->texture_states.samplers[i]->SQ_TEX_SAMPLER1.u32All); - R700E32 (context, r700->texture_states.samplers[i]->SQ_TEX_SAMPLER2.u32All); - } + for (i=0; itextures[i]; + if (t) { + if (!t->image_override) + bo = t->mt->bo; + else + bo = t->bo; + if (bo) { + BEGIN_BATCH_NO_AUTOSTATE(14); + R600_OUT_BATCH(CP_PACKET3(R600_IT_SET_RESOURCE, 7)); + R600_OUT_BATCH(i * 7); + R600_OUT_BATCH(r700->textures[i]->SQ_TEX_RESOURCE0); + R600_OUT_BATCH(r700->textures[i]->SQ_TEX_RESOURCE1); + R600_OUT_BATCH_RELOC(r700->textures[i]->SQ_TEX_RESOURCE2, + bo, + 0, + RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0, &offset_mod); + R600_OUT_BATCH_RELOC(r700->textures[i]->SQ_TEX_RESOURCE3, + bo, + 0, + RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0, &offset_mod); + R600_OUT_BATCH(r700->textures[i]->SQ_TEX_RESOURCE4); + R600_OUT_BATCH(r700->textures[i]->SQ_TEX_RESOURCE5); + R600_OUT_BATCH(r700->textures[i]->SQ_TEX_RESOURCE6); + + R600_OUT_BATCH(CP_PACKET3(R600_IT_SET_SAMPLER, 3)); + R600_OUT_BATCH(i * 3); + R600_OUT_BATCH(r700->textures[i]->SQ_TEX_SAMPLER0); + R600_OUT_BATCH(r700->textures[i]->SQ_TEX_SAMPLER1); + R600_OUT_BATCH(r700->textures[i]->SQ_TEX_SAMPLER2); + END_BATCH(); + COMMIT_BATCH(); + } + } } -#endif return GL_TRUE; } @@ -253,6 +264,9 @@ static GLboolean r700RunRender(GLcontext * ctx, fp->r700AsmCode.bR6xx = 1; } + if (!r600ValidateBuffers(ctx)) + return GL_TRUE; + r700Start3D(context); /* TODO : this is too much. */ r700SyncSurf(context); /* TODO : make it light. */ @@ -273,7 +287,7 @@ static GLboolean r700RunRender(GLcontext * ctx, /* flush TX */ //r700SyncSurf(context); /* */ - r700UpdateTextureState(context); + r600UpdateTextureState(ctx); r700SendTextureState(context); if(GL_FALSE == fp->translated) @@ -391,7 +405,7 @@ static GLboolean r700RunTCLRender(GLcontext * ctx, /*----------------------*/ /** * Ensure all enabled and complete textures are uploaded along with any buffers being used. */ - if(!r700ValidateBuffers(ctx)) + if(!r600ValidateBuffers(ctx)) { return GL_TRUE; } diff --git a/src/mesa/drivers/dri/r600/r700_tex.c b/src/mesa/drivers/dri/r600/r700_tex.c deleted file mode 100644 index 21c93797290..00000000000 --- a/src/mesa/drivers/dri/r600/r700_tex.c +++ /dev/null @@ -1,1558 +0,0 @@ -/* - * Copyright (C) 2008-2009 Advanced Micro Devices, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included - * in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN - * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ - -/* - * Authors: - * Richard Li , - */ - -#include "main/glheader.h" -#include "main/imports.h" -#include "main/colormac.h" -#include "main/context.h" -#include "main/simple_list.h" -#include "main/texformat.h" -#include "main/texstore.h" -#include "texmem.h" -#include "main/teximage.h" -#include "main/texobj.h" -#include "main/macros.h" -#include "xmlpool.h" - -#include "radeon_common.h" - -#include "r600_context.h" - -#include "r700_state.h" - -#include "r700_tex.h" - - -/* to be enable */ -void r700SetTexBuffer(__DRIcontext *pDRICtx, GLint target, - __DRIdrawable *dPriv) -{ -} - -/* to be enable */ -void r700SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, - GLint format, __DRIdrawable *dPriv) -{ -} - -/* to be enable */ -void r700SetTexOffset(__DRIcontext *pDRICtx, GLint texname, - unsigned long long offset, GLint depth, - GLuint pitch) -{ -} - -static GLboolean r700GetTexFormat(struct gl_texture_object *tObj, GLuint mesa_format) -{ - r700TexObjPtr t = (r700TexObjPtr) tObj->DriverData; - - t->texture_state.SQ_TEX_RESOURCE4.u32All &= ~( SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask - |SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask - |SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask - |SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask ); - - switch (mesa_format) /* This is mesa format. */ - { - case MESA_FORMAT_RGBA8888: - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_8_8_8_8, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - - break; - case MESA_FORMAT_RGBA8888_REV: - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_8_8_8_8, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - - break; - case MESA_FORMAT_ARGB8888: - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_8_8_8_8, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case MESA_FORMAT_ARGB8888_REV: - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_8_8_8_8, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - - case MESA_FORMAT_RGB888: - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_8_8_8, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_1 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case MESA_FORMAT_RGB565: - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_5_6_5, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_1 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case MESA_FORMAT_RGB565_REV: - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_5_6_5, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_1 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case MESA_FORMAT_ARGB4444: - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_4_4_4_4, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case MESA_FORMAT_ARGB4444_REV: - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_4_4_4_4, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case MESA_FORMAT_ARGB1555: - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_1_5_5_5, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case MESA_FORMAT_ARGB1555_REV: - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_1_5_5_5, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case MESA_FORMAT_AL88: - case MESA_FORMAT_AL88_REV: /* TODO : Check this. */ - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_8_8, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case MESA_FORMAT_RGB332: - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_3_3_2, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_1 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case MESA_FORMAT_A8: /* ZERO, ZERO, ZERO, X */ - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_8, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_0 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_0 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_0 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case MESA_FORMAT_L8: /* X, X, X, ONE */ - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_8, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_1 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case MESA_FORMAT_I8: /* X, X, X, X */ - case MESA_FORMAT_CI8: - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_8, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - /* YUV422 TODO conversion */ /* X, Y, Z, ONE, G8R8_G8B8 */ - /* - case MESA_FORMAT_YCBCR: - t->texture_state.SQ_TEX_RESOURCE1.bitfields.DATA_FORMAT = ; - break; - */ - /* VUY422 TODO conversion */ /* X, Y, Z, ONE, G8R8_G8B8 */ - /* - case MESA_FORMAT_YCBCR_REV: - t->texture_state.SQ_TEX_RESOURCE1.bitfields.DATA_FORMAT = ; - break; - */ - case MESA_FORMAT_RGB_DXT1: /* not supported yet */ - - break; - case MESA_FORMAT_RGBA_DXT1: /* not supported yet */ - - break; - case MESA_FORMAT_RGBA_DXT3: /* not supported yet */ - - break; - case MESA_FORMAT_RGBA_DXT5: /* not supported yet */ - - break; - case MESA_FORMAT_RGBA_FLOAT32: - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_32_32_32_32_FLOAT, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case MESA_FORMAT_RGBA_FLOAT16: - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_16_16_16_16_FLOAT, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case MESA_FORMAT_RGB_FLOAT32: /* X, Y, Z, ONE */ - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_32_32_32_FLOAT, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_1 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case MESA_FORMAT_RGB_FLOAT16: - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_16_16_16_FLOAT, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_1 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case MESA_FORMAT_ALPHA_FLOAT32: /* ZERO, ZERO, ZERO, X */ - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_32_FLOAT, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_0 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_0 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_0 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case MESA_FORMAT_ALPHA_FLOAT16: /* ZERO, ZERO, ZERO, X */ - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_16_FLOAT, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_0 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_0 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_0 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case MESA_FORMAT_LUMINANCE_FLOAT32: /* X, X, X, ONE */ - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_32_FLOAT, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_1 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case MESA_FORMAT_LUMINANCE_FLOAT16: /* X, X, X, ONE */ - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_16_FLOAT, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_1 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32: - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_32_32_FLOAT, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT16: - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_16_16_FLOAT, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case MESA_FORMAT_INTENSITY_FLOAT32: /* X, X, X, X */ - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_32_FLOAT, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case MESA_FORMAT_INTENSITY_FLOAT16: /* X, X, X, X */ - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_16_FLOAT, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case MESA_FORMAT_Z16: - case MESA_FORMAT_Z24_S8: - case MESA_FORMAT_Z32: - switch (mesa_format) - { - case MESA_FORMAT_Z16: - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_16, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - break; - case MESA_FORMAT_Z24_S8: - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_24_8, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - break; - case MESA_FORMAT_Z32: - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_32, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - }; - switch (tObj->DepthMode) - { - case GL_LUMINANCE: /* X, X, X, ONE */ - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_1 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case GL_INTENSITY: /* X, X, X, X */ - - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - case GL_ALPHA: /* ZERO, ZERO, ZERO, X */ - t->texture_state.SQ_TEX_RESOURCE4.u32All |= - (SQ_SEL_0 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift) - |(SQ_SEL_0 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift) - |(SQ_SEL_0 << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift) - |(SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift); - break; - default: - return GL_FALSE; - } - break; - default: - /* Not supported format */ - return GL_FALSE; - }; - - return GL_TRUE; -} - -static void compute_tex_image_offset( - struct gl_texture_object *tObj, - GLuint face, - GLint level, - GLint* curOffset) -{ - r700TexObjPtr t = (r700TexObjPtr) tObj->DriverData; - const struct gl_texture_image* texImage; - GLuint blitWidth = R700_BLIT_WIDTH_BYTES; - GLuint texelBytes; - GLuint size; - GLuint pitch; - - texImage = tObj->Image[0][level + t->base.firstLevel]; - if (!texImage) - { - return; - } - - texelBytes = texImage->TexFormat->TexelBytes; - - pitch = (texImage->Width + R700_TEXEL_PITCH_ALIGNMENT_MASK) & ~R700_TEXEL_PITCH_ALIGNMENT_MASK; - - /* find image size in bytes */ - if (texImage->IsCompressed) - { - /* not supported yet */ - } - else if (tObj->Target == GL_TEXTURE_RECTANGLE_NV) - { - if( (ARRAY_LINEAR_ALIGNED << SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_shift) - == (t->texture_state.SQ_TEX_RESOURCE0.u32All & SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_mask) ) - { - pitch = (texImage->Width * texelBytes + 255) & ~255; - } - else - { - if(0 == level) - { - pitch = (pitch * texelBytes + 63) & ~63; - } - else - { - pitch = texImage->Width * texelBytes; - } - } - size = pitch * texImage->Height; - blitWidth = 64 / texelBytes; - pitch /= texelBytes; - } - else - { - if( (ARRAY_LINEAR_ALIGNED << SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_shift) - == (t->texture_state.SQ_TEX_RESOURCE0.u32All & SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_mask) ) - { - pitch = (texImage->Width * texelBytes + 255) & ~255; - } - else - { - if(0 == level) - { - pitch = (pitch * texelBytes + 31) & ~31; - } - else - { - pitch = texImage->Width * texelBytes; - } - } - size = pitch * texImage->Height * texImage->Depth; - blitWidth = MAX2(texImage->Width, 64 / texelBytes); - pitch /= texelBytes; - } - assert(size > 0); - - if( (0 == level) || (1 == level) ) /* 0 for BASE_ADDRESS, 1 for MIP_ADDRESS */ - { - *curOffset = (*curOffset + R700_TEXTURE_ALIGNMENT_MASK) & ~R700_TEXTURE_ALIGNMENT_MASK; - } - - if (texelBytes) - { - /* fix x and y coords up later together with offset */ - t->texel_pitch[face][level] = pitch; - t->level_offset[face][level] = *curOffset; - t->byte_per_texel = texelBytes; - t->src_width_in_pexel[face][level] = texImage->Width; - t->src_hight_in_pexel[face][level] = texImage->Height; - } - else - { - /* Do it like one byte texel. */ - pitch = (size + R700_TEXEL_PITCH_ALIGNMENT_MASK) & ~R700_TEXEL_PITCH_ALIGNMENT_MASK; - t->texel_pitch[face][level] = pitch; - t->level_offset[face][level] = *curOffset; - t->byte_per_texel = 1; - t->src_width_in_pexel[face][level] = size; - t->src_hight_in_pexel[face][level] = 1; - } - - *curOffset += size; -} - -void r700DestroyTexObj(context_t context, r700TexObjPtr t) -{ - /* TODO : nuke r700 chip texture and sampler pointer. */ - //int i; - - //for (i = 0; i < rmesa->ctx->Const.MaxTextureUnits; i++) - //{ - //if (rmesa->state.texture.unit[i].texobj == t) { - // rmesa->state.texture.unit[i].texobj = NULL; - //} - //} -} - -static void r700SetTexImages(context_t *context, struct gl_texture_object *tObj) -{ -#if 0 /* to be enabled */ - r700TexObjPtr t = (r700TexObjPtr) tObj->DriverData; - const struct gl_texture_image *baseImage = tObj->Image[0][tObj->BaseLevel]; - GLint curOffset; - GLint i, texelBytes; - GLint numLevels; - GLint log2Width, log2Height, log2Depth; - GLuint uTexelPitch; - - if (!t->image_override) - { - if(GL_FALSE == r700GetTexFormat(tObj, baseImage->TexFormat->MesaFormat) ) - { - _mesa_problem(NULL, "unexpected texture format in %s", __FUNCTION__); - return; - } - } - - texelBytes = baseImage->TexFormat->TexelBytes; - - switch (tObj->Target) - { - case GL_TEXTURE_1D: - SETfield(t->texture_state.SQ_TEX_RESOURCE0.u32All, SQ_TEX_DIM_1D, DIM_shift, DIM_mask); - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, 0, TEX_DEPTH_shift, TEX_DEPTH_mask); - break; - case GL_TEXTURE_2D: - case GL_TEXTURE_RECTANGLE_NV: - SETfield(t->texture_state.SQ_TEX_RESOURCE0.u32All, SQ_TEX_DIM_2D, DIM_shift, DIM_mask); - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, 0, TEX_DEPTH_shift, TEX_DEPTH_mask); - break; - case GL_TEXTURE_3D: - SETfield(t->texture_state.SQ_TEX_RESOURCE0.u32All, SQ_TEX_DIM_3D, DIM_shift, DIM_mask); - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, tObj->Image[0][t->base.firstLevel]->Depth - 1, - TEX_DEPTH_shift, TEX_DEPTH_mask); - break; - case GL_TEXTURE_CUBE_MAP: - SETfield(t->texture_state.SQ_TEX_RESOURCE0.u32All, SQ_TEX_DIM_CUBEMAP, DIM_shift, DIM_mask); - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, 0, TEX_DEPTH_shift, TEX_DEPTH_mask); - break; - default: - _mesa_problem(NULL, "unexpected texture target type in %s", __FUNCTION__); - return; - } - - /* Compute which mipmap levels we really want to send to the hardware. - */ - driCalculateTextureFirstLastLevel((driTextureObject *) t); - log2Width = tObj->Image[0][t->base.firstLevel]->WidthLog2; - log2Height = tObj->Image[0][t->base.firstLevel]->HeightLog2; - log2Depth = tObj->Image[0][t->base.firstLevel]->DepthLog2; - - numLevels = t->base.lastLevel - t->base.firstLevel + 1; - - assert(numLevels <= RADEON_MAX_TEXTURE_LEVELS); - - /* Calculate mipmap offsets and dimensions for blitting (uploading) - * The idea is that we lay out the mipmap levels within a block of - * memory organized as a rectangle of width BLIT_WIDTH_BYTES. - */ - t->tile_bits = 0; - - curOffset = 0; - - if (tObj->Target == GL_TEXTURE_CUBE_MAP) - { - ASSERT(log2Width == log2Height); - - for(i = 0; i < numLevels; i++) - { - /* i is hw level */ - GLuint face; - for(face = 0; face < 6; face++) - { - compute_tex_image_offset(tObj, face, i, &curOffset); - } - } - } - else - { - for (i = 0; i < numLevels; i++) - { - /* i is hw level */ - compute_tex_image_offset(tObj, 0, i, &curOffset); - } - } - - /* Align the total size of texture memory block. - */ - t->base.totalSize = (curOffset + R700_TEXTURE_ALIGNMENT_MASK) & ~R700_TEXTURE_ALIGNMENT_MASK; - - t->pitch = 0; - - /* TODO : baseImage->IsCompressed, tObj->Target == GL_TEXTURE_RECTANGLE_NV */ - - uTexelPitch = (tObj->Image[0][t->base.firstLevel]->Width + R700_TEXEL_PITCH_ALIGNMENT_MASK) - & ~R700_TEXEL_PITCH_ALIGNMENT_MASK; - - SETfield(t->texture_state.SQ_TEX_RESOURCE0.u32All, (uTexelPitch/8)-1, PITCH_shift, PITCH_mask); - SETfield(t->texture_state.SQ_TEX_RESOURCE0.u32All, tObj->Image[0][t->base.firstLevel]->Width - 1, - TEX_WIDTH_shift, TEX_WIDTH_mask); - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, tObj->Image[0][t->base.firstLevel]->Height - 1, - TEX_HEIGHT_shift, TEX_HEIGHT_mask); -#endif /* to be enabled */ -} - -static void r700UploadSubImage(context_t *context, - r700TexObjPtr t, - GLint hwlevel, /* relative level to first real level. */ - GLint x, - GLint y, - GLuint face) -{ -#if 0 /* to be enabled */ - struct gl_texture_image *texImage = NULL; - GLuint offset; - GLint imageWidth, imageHeight; - GLint ret; - const int level = hwlevel + t->base.firstLevel; - - unsigned char *pSrc; - - ASSERT(face < 6); - - /* Ensure we have a valid texture to upload */ - if ((hwlevel < 0) || (hwlevel >= RADEON_MAX_TEXTURE_LEVELS)) - { - _mesa_problem(NULL, "bad texture level in %s", __FUNCTION__); - return; - } - - texImage = t->base.tObj->Image[face][level]; - - if (!texImage) - { - return; - } - if (!texImage->Data) - { - return; - } - - if (t->base.tObj->Target == GL_TEXTURE_RECTANGLE_NV) - { - /* TODO : - assert(level == 0); - assert(hwlevel == 0); - - r300UploadRectSubImage(rmesa, t, texImage, x, y, width, height); - */ - return; - } - else if (texImage->IsClientData) - { - /* TODO : - r300UploadGARTClientSubImage(rmesa, t, texImage, hwlevel, x, y, - width, height); - */ - return; - } - - imageWidth = texImage->Width; - imageHeight = texImage->Height; - - /* use hwlevel for hwsurf. */ - offset = t->bufAddr + t->level_offset[face][hwlevel]; - - pSrc = (unsigned char*)(texImage->Data); - - (context->chipobj.LoadMemSurf)(context, - offset, /* gpu addr */ - t->texel_pitch[face][hwlevel], /* dst_pitch_in_pixel */ - t->src_width_in_pexel[face][hwlevel], /*src_width_in_pixel */ - t->src_hight_in_pexel[face][hwlevel], /* height */ - t->byte_per_texel, /* byte_per_pixel */ - pSrc); /* source data */ -#endif /* to be enabled */ -} - -int r700UploadTexImages(GLcontext * ctx, struct gl_texture_object *tObj, GLuint face) -{ -#if 0 /* to be enabled */ - context_t *context = R700_CONTEXT(ctx); - r700TexObjPtr t = (r700TexObjPtr) tObj->DriverData; - - int heap; - const int numLevels = t->base.lastLevel - t->base.firstLevel + 1; - - if (t->image_override) - { - return 0; - } - - if (t->base.totalSize == 0) - { - return 0; - } - /* TODO */ - /*LOCK_HARDWARE(&rmesa->radeon);*/ - - if (t->base.memBlock == NULL) - { - heap = RADEON_LOCAL_TEX_HEAP; - if( GL_FALSE == (context->chipobj.AllocMemSurf)(context, - &(t->base.memBlock), - &(t->base.heap), - &heap, /* prefered_heap, also return the actual heap used. */ - t->base.totalSize) ) - { - /* TODO */ - /* UNLOCK_HARDWARE(&rmesa->radeon); */ - return -1; - } - - /* Set the base offset of the texture image */ - t->bufAddr = context->screen->texOffset[heap] + t->base.memBlock->ofs; - t->offset = t->bufAddr; - - /* - if (!(t->base.tObj->Image[0][0]->IsClientData)) - { - t->offset |= t->tile_bits; - } - */ - } - - /* Let the world know we've used this memory recently. - */ - driUpdateTextureLRU((driTextureObject *) t); - - /* TODO */ - /* UNLOCK_HARDWARE(&rmesa->radeon); */ - - /* Upload any images that are new */ - if (t->my_dirty_images[face]) - { - int i; - for(i = 0; i < numLevels; i++) - { - if( (t->my_dirty_images[face] & (1 << (i + t->base.firstLevel))) !=0) - { - r700UploadSubImage(context, - t, - i, /* i is hw level */ - 0, - 0, - face); - } - } - t->base.dirty_images[face] = 0; - t->my_dirty_images[face] = 0; - } - - /* TODO : 3D, CUBE */ - t->texture_state.SQ_TEX_RESOURCE2.u32All = t->bufAddr / 256; - if( (t->base.lastLevel - t->base.firstLevel) > 0 ) - { - t->texture_state.SQ_TEX_RESOURCE3.u32All = (t->bufAddr + t->level_offset[0][1]) / 256; /* MIP_ADDRESS */ - - SETfield(t->texture_state.SQ_TEX_RESOURCE4.u32All, t->base.firstLevel, BASE_LEVEL_shift, BASE_LEVEL_mask); - SETfield(t->texture_state.SQ_TEX_RESOURCE5.u32All, t->base.lastLevel, LAST_LEVEL_shift, LAST_LEVEL_mask); - } -#endif /* to be enabled */ - return 0; -} - -static GLboolean r700EnableTexture2D(GLcontext * ctx, int unit) -{ - context_t *context = R700_CONTEXT(ctx); - struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit]; - struct gl_texture_object *tObj = texUnit->_Current; - r700TexObjPtr t = (r700TexObjPtr) tObj->DriverData; - - ASSERT(tObj->Target == GL_TEXTURE_2D || tObj->Target == GL_TEXTURE_1D); - - if (t->base.dirty_images[0]) - { - r700SetTexImages(context, tObj); - r700UploadTexImages(ctx, tObj, 0); - if (!t->base.memBlock && !t->image_override) - { - return GL_FALSE; - } - } - return GL_TRUE; -} - -/* try to find a format which will only need a memcopy */ -static const struct gl_texture_format *r700Choose8888TexFormat(GLenum srcFormat, - GLenum srcType) -{ - struct gl_texture_format * gtfRet; - - const GLuint ui = 1; - const GLubyte littleEndian = *((const GLubyte *)&ui); - - if ((srcFormat == GL_RGBA && srcType == GL_UNSIGNED_INT_8_8_8_8) || - (srcFormat == GL_RGBA && srcType == GL_UNSIGNED_BYTE && !littleEndian) || - (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_INT_8_8_8_8_REV) || - (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_BYTE && littleEndian)) - { - gtfRet = &_mesa_texformat_rgba8888; - } - else if ((srcFormat == GL_RGBA && srcType == GL_UNSIGNED_INT_8_8_8_8_REV) || - (srcFormat == GL_RGBA && srcType == GL_UNSIGNED_BYTE && littleEndian) || - (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_INT_8_8_8_8) || - (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_BYTE && !littleEndian)) - { - gtfRet = &_mesa_texformat_rgba8888_rev; - } - else if (srcFormat == GL_BGRA && ((srcType == GL_UNSIGNED_BYTE && !littleEndian) || - srcType == GL_UNSIGNED_INT_8_8_8_8)) - { - gtfRet = &_mesa_texformat_argb8888_rev; - } - else if (srcFormat == GL_BGRA && ((srcType == GL_UNSIGNED_BYTE && littleEndian) || - srcType == GL_UNSIGNED_INT_8_8_8_8_REV)) - { - gtfRet = &_mesa_texformat_argb8888; - } - else - { - gtfRet = _dri_texformat_argb8888; - } - - return gtfRet; -} - -static r700TexObjPtr r700AllocTexObj(struct gl_texture_object *texObj) -{ - r700TexObjPtr t; - - t = CALLOC_STRUCT(r700_tex_obj); - texObj->DriverData = t; - if (t != NULL) - { -#if 0 /* to be enabled */ - /* Initialize non-image-dependent parts of the state: - */ - t->base.tObj = texObj; - t->border_fallback = GL_FALSE; - - make_empty_list(&t->base); - - /* Init text object to default states. */ - t->texture_state.SQ_TEX_RESOURCE0.u32All = 0; - SETfield(t->texture_state.SQ_TEX_RESOURCE0.u32All, SQ_TEX_DIM_2D, DIM_shift, DIM_mask); - SETfield(t->texture_state.SQ_TEX_RESOURCE0.u32All, ARRAY_LINEAR_GENERAL, - SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_shift, SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_mask); - CLEARbit(t->texture_state.SQ_TEX_RESOURCE0.u32All, TILE_TYPE_bit); - - t->texture_state.SQ_TEX_RESOURCE1.u32All = 0; - SETfield(t->texture_state.SQ_TEX_RESOURCE1.u32All, FMT_8_8_8_8, - SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask); - - t->texture_state.SQ_TEX_RESOURCE2.u32All = 0; - t->texture_state.SQ_TEX_RESOURCE3.u32All = 0; - - t->texture_state.SQ_TEX_RESOURCE4.u32All = 0; - SETfield(t->texture_state.SQ_TEX_RESOURCE4.u32All, SQ_FORMAT_COMP_UNSIGNED, - FORMAT_COMP_X_shift, FORMAT_COMP_X_mask); - SETfield(t->texture_state.SQ_TEX_RESOURCE4.u32All, SQ_FORMAT_COMP_UNSIGNED, - FORMAT_COMP_Y_shift, FORMAT_COMP_Y_mask); - SETfield(t->texture_state.SQ_TEX_RESOURCE4.u32All, SQ_FORMAT_COMP_UNSIGNED, - FORMAT_COMP_Z_shift, FORMAT_COMP_Z_mask); - SETfield(t->texture_state.SQ_TEX_RESOURCE4.u32All, SQ_FORMAT_COMP_UNSIGNED, - FORMAT_COMP_W_shift, FORMAT_COMP_W_mask); - SETfield(t->texture_state.SQ_TEX_RESOURCE4.u32All, SQ_NUM_FORMAT_NORM, - SQ_TEX_RESOURCE_WORD4_0__NUM_FORMAT_ALL_shift, SQ_TEX_RESOURCE_WORD4_0__NUM_FORMAT_ALL_mask); - CLEARbit(t->texture_state.SQ_TEX_RESOURCE4.u32All, SQ_TEX_RESOURCE_WORD4_0__SRF_MODE_ALL_bit); - CLEARbit(t->texture_state.SQ_TEX_RESOURCE4.u32All, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit); - SETfield(t->texture_state.SQ_TEX_RESOURCE4.u32All, SQ_ENDIAN_NONE, - SQ_TEX_RESOURCE_WORD4_0__ENDIAN_SWAP_shift, SQ_TEX_RESOURCE_WORD4_0__ENDIAN_SWAP_mask); - SETfield(t->texture_state.SQ_TEX_RESOURCE4.u32All, 1, REQUEST_SIZE_shift, REQUEST_SIZE_mask); - t->texture_state.SQ_TEX_RESOURCE4.u32All |= SQ_SEL_X << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift - |SQ_SEL_Y << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift - |SQ_SEL_Z << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift - |SQ_SEL_W << SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift; - SETfield(t->texture_state.SQ_TEX_RESOURCE4.u32All, 0, BASE_LEVEL_shift, BASE_LEVEL_mask); /* mip-maps */ - - t->texture_state.SQ_TEX_RESOURCE5.u32All = 0; - - t->texture_state.SQ_TEX_RESOURCE6.u32All = 0; - - SETfield(t->texture_state.SQ_TEX_RESOURCE6.u32All, SQ_TEX_VTX_VALID_TEXTURE, - SQ_TEX_RESOURCE_WORD6_0__TYPE_shift, SQ_TEX_RESOURCE_WORD6_0__TYPE_mask); - - /* Initialize sampler registers */ - t->sampler_state.SQ_TEX_SAMPLER0.u32All = 0; - t->sampler_state.SQ_TEX_SAMPLER0.u32All |= - SQ_TEX_WRAP << SQ_TEX_SAMPLER_WORD0_0__CLAMP_X_shift - |SQ_TEX_WRAP << CLAMP_Y_shift - |SQ_TEX_WRAP << CLAMP_Z_shift - |SQ_TEX_XY_FILTER_POINT << XY_MAG_FILTER_shift - |SQ_TEX_XY_FILTER_POINT << XY_MIN_FILTER_shift - |SQ_TEX_Z_FILTER_NONE << Z_FILTER_shift - |SQ_TEX_Z_FILTER_NONE << MIP_FILTER_shift - |SQ_TEX_BORDER_COLOR_TRANS_BLACK << BORDER_COLOR_TYPE_shift; - - t->sampler_state.SQ_TEX_SAMPLER1.u32All = 0x7FF << MAX_LOD_shift; - - t->sampler_state.SQ_TEX_SAMPLER2.u32All = 0; - SETbit(t->sampler_state.SQ_TEX_SAMPLER2.u32All, SQ_TEX_SAMPLER_WORD2_0__TYPE_bit); -#endif /* to be enabled */ - } - - return t; -} - -static GLboolean -r700ValidateClientStorage(GLcontext * ctx, GLenum target, - GLint internalFormat, - GLint srcWidth, GLint srcHeight, - GLenum format, GLenum type, const void *pixels, - const struct gl_pixelstore_attrib *packing, - struct gl_texture_object *texObj, - struct gl_texture_image *texImage) -{ - if (!ctx->Unpack.ClientStorage) - { - return 0; - } - - if (ctx->_ImageTransferState || - texImage->IsCompressed || texObj->GenerateMipmap) - { - return 0; - } - - /* This list is incomplete, may be different on ppc??? - */ - switch (internalFormat) - { - case GL_RGBA: - if (format == GL_BGRA && type == GL_UNSIGNED_INT_8_8_8_8_REV) - { - texImage->TexFormat = _dri_texformat_argb8888; - } - else - { - return 0; - } - break; - - case GL_RGB: - if (format == GL_RGB && type == GL_UNSIGNED_SHORT_5_6_5) - { - texImage->TexFormat = _dri_texformat_rgb565; - } - else - { - return 0; - } - break; - - case GL_YCBCR_MESA: - if (format == GL_YCBCR_MESA && - type == GL_UNSIGNED_SHORT_8_8_REV_APPLE) - { - texImage->TexFormat = &_mesa_texformat_ycbcr_rev; - } - else if( format == GL_YCBCR_MESA && - (type == GL_UNSIGNED_SHORT_8_8_APPLE || type == GL_UNSIGNED_BYTE)) - { - texImage->TexFormat = &_mesa_texformat_ycbcr; - } - else - { - return 0; - } - break; - - default: - return 0; - } - - /* Could deal with these packing issues, but currently don't: - */ - if (packing->SkipPixels || - packing->SkipRows || packing->SwapBytes || packing->LsbFirst) - { - return 0; - } - - GLint srcRowStride = _mesa_image_row_stride(packing, srcWidth, format, type); - - /* Have validated that _mesa_transfer_teximage would be a straight - * memcpy at this point. NOTE: future calls to TexSubImage will - * overwrite the client data. This is explicitly mentioned in the - * extension spec. - */ - texImage->Data = (void *)pixels; - texImage->IsClientData = GL_TRUE; - texImage->RowStride = srcRowStride / texImage->TexFormat->TexelBytes; - - return 1; -} - -static void r700TexImage1D(GLcontext * ctx, GLenum target, GLint level, - GLint internalFormat, - GLint width, GLint border, - GLenum format, GLenum type, const GLvoid * pixels, - const struct gl_pixelstore_attrib *packing, - struct gl_texture_object *texObj, - struct gl_texture_image *texImage) -{ -} - -static void r700TexImage2D(GLcontext * ctx, GLenum target, GLint level, - GLint internalFormat, - GLint width, GLint height, GLint border, - GLenum format, GLenum type, const GLvoid * pixels, - const struct gl_pixelstore_attrib *packing, - struct gl_texture_object *texObj, - struct gl_texture_image *texImage) -{ -#if 0 /* to be enabled */ - r700TexObjPtr r700t = (r700TexObjPtr) texObj->DriverData; - - driTextureObject *t = (driTextureObject *) texObj->DriverData; - GLuint face; - - /* which cube face or ordinary 2D image */ - switch (target) - { - case GL_TEXTURE_CUBE_MAP_POSITIVE_X: - case GL_TEXTURE_CUBE_MAP_NEGATIVE_X: - case GL_TEXTURE_CUBE_MAP_POSITIVE_Y: - case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y: - case GL_TEXTURE_CUBE_MAP_POSITIVE_Z: - case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z: - face = (GLuint) target - (GLuint) GL_TEXTURE_CUBE_MAP_POSITIVE_X; - ASSERT(face < 6); - break; - default: - face = 0; - } - - if (t != NULL) - { - driSwapOutTextureObject(t); - } - else - { - t = (driTextureObject *) r700AllocTexObj(texObj); - if (!t) - { - _mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexImage2D"); - return; - } - } - - texImage->IsClientData = GL_FALSE; - - if (r700ValidateClientStorage(ctx, target, - internalFormat, - width, height, - format, type, pixels, - packing, texObj, texImage)) - { - /* client maintained surface */ - } - else - { - /* Normal path: copy (to cached memory) and eventually upload - * via another copy to GART memory and then a blit... Could - * eliminate one copy by going straight to (permanent) GART. - * - * Note, this will call r700ChooseTextureFormat. - */ - _mesa_store_teximage2d(ctx, target, level, internalFormat, - width, height, border, format, type, - pixels, &ctx->Unpack, texObj, texImage); - - t->dirty_images[face] |= (1 << level); - - /* mesa dirty_images is not correct, so use own one for now, review it later. */ - r700t->my_dirty_images[face] |= (1 << level); - } -#endif /* to be enabled */ -} - -static void r700TexImage3D(GLcontext * ctx, GLenum target, GLint level, - GLint internalFormat, - GLint width, GLint height, GLint depth, - GLint border, - GLenum format, GLenum type, const GLvoid * pixels, - const struct gl_pixelstore_attrib *packing, - struct gl_texture_object *texObj, - struct gl_texture_image *texImage) -{ -} - -static void r700TexSubImage1D(GLcontext * ctx, GLenum target, GLint level, - GLint xoffset, - GLsizei width, - GLenum format, GLenum type, - const GLvoid * pixels, - const struct gl_pixelstore_attrib *packing, - struct gl_texture_object *texObj, - struct gl_texture_image *texImage) -{ - -} - -static void r700TexSubImage2D(GLcontext * ctx, GLenum target, GLint level, - GLint xoffset, GLint yoffset, - GLsizei width, GLsizei height, - GLenum format, GLenum type, - const GLvoid * pixels, - const struct gl_pixelstore_attrib *packing, - struct gl_texture_object *texObj, - struct gl_texture_image *texImage) -{ -} - -static void r700TexSubImage3D(GLcontext * ctx, GLenum target, GLint level, - GLint xoffset, GLint yoffset, GLint zoffset, - GLsizei width, GLsizei height, GLsizei depth, - GLenum format, GLenum type, - const GLvoid * pixels, - const struct gl_pixelstore_attrib *packing, - struct gl_texture_object *texObj, - struct gl_texture_image *texImage) -{ -} - -/** - * Allocate a new texture object. - * Called via ctx->Driver.NewTextureObject. - * Note: this function will be called during context creation to - * allocate the default texture objects. - * Note: we could use containment here to 'derive' the driver-specific - * texture object from the core mesa gl_texture_object. Not done at this time. - */ -static struct gl_texture_object *r700NewTextureObject(GLcontext * ctx, - GLuint name, - GLenum target) -{ - context_t *context = R700_CONTEXT(ctx); - - struct gl_texture_object *obj; - - obj = _mesa_new_texture_object(ctx, name, target); - if (!obj) - { - return NULL; - } - - //obj->MaxAnisotropy = context->initialMaxAnisotropy; - - r700AllocTexObj(obj); - - return obj; -} - -static void r700BindTexture(GLcontext * ctx, GLenum target, - struct gl_texture_object *texObj) -{ - if ((target == GL_TEXTURE_1D) - || (target == GL_TEXTURE_2D) - || (target == GL_TEXTURE_3D) - || (target == GL_TEXTURE_CUBE_MAP) - || (target == GL_TEXTURE_RECTANGLE_NV)) - { - assert(texObj->DriverData != NULL); - } -} - -static void r700DeleteTexture(GLcontext * ctx, struct gl_texture_object *texObj) -{ -} - -#if 0 /* to be enabled */ -static void r700SetTexMinFilter(r700TexObjPtr t, GLenum minf) -{ - switch (minf) - { - case GL_NEAREST: - - SETfield(t->sampler_state.SQ_TEX_SAMPLER0.u32All, TEX_XYFilter_Point, - XY_MIN_FILTER_shift, XY_MIN_FILTER_mask); - - SETfield(t->sampler_state.SQ_TEX_SAMPLER0.u32All, TEX_MipFilter_None, - MIP_FILTER_shift, MIP_FILTER_mask); - break; - case GL_LINEAR: - - SETfield(t->sampler_state.SQ_TEX_SAMPLER0.u32All, TEX_XYFilter_Linear, - XY_MIN_FILTER_shift, XY_MIN_FILTER_mask); - - SETfield(t->sampler_state.SQ_TEX_SAMPLER0.u32All, TEX_MipFilter_None, - MIP_FILTER_shift, MIP_FILTER_mask); - break; - case GL_NEAREST_MIPMAP_NEAREST: - - SETfield(t->sampler_state.SQ_TEX_SAMPLER0.u32All, TEX_XYFilter_Point, - XY_MIN_FILTER_shift, XY_MIN_FILTER_mask); - - SETfield(t->sampler_state.SQ_TEX_SAMPLER0.u32All, TEX_MipFilter_Point, - MIP_FILTER_shift, MIP_FILTER_mask); - break; - case GL_LINEAR_MIPMAP_NEAREST: - - SETfield(t->sampler_state.SQ_TEX_SAMPLER0.u32All, TEX_XYFilter_Linear, - XY_MIN_FILTER_shift, XY_MIN_FILTER_mask); - - SETfield(t->sampler_state.SQ_TEX_SAMPLER0.u32All, TEX_MipFilter_Point, - MIP_FILTER_shift, MIP_FILTER_mask); - break; - case GL_NEAREST_MIPMAP_LINEAR: - - SETfield(t->sampler_state.SQ_TEX_SAMPLER0.u32All, TEX_XYFilter_Point, - XY_MIN_FILTER_shift, XY_MIN_FILTER_mask); - - SETfield(t->sampler_state.SQ_TEX_SAMPLER0.u32All, TEX_MipFilter_Linear, - MIP_FILTER_shift, MIP_FILTER_mask); - break; - case GL_LINEAR_MIPMAP_LINEAR: - - SETfield(t->sampler_state.SQ_TEX_SAMPLER0.u32All, TEX_XYFilter_Linear, - XY_MIN_FILTER_shift, XY_MIN_FILTER_mask); - - SETfield(t->sampler_state.SQ_TEX_SAMPLER0.u32All, TEX_MipFilter_Linear, - MIP_FILTER_shift, MIP_FILTER_mask); - break; - default: - /* no case */ - break; - } -} - -static void r700SetTexMagFilter(r700TexObjPtr t, GLenum magf) -{ - switch(magf) - { - case GL_NEAREST: - - SETfield(t->sampler_state.SQ_TEX_SAMPLER0.u32All, TEX_XYFilter_Point, - XY_MAG_FILTER_shift, XY_MAG_FILTER_mask); - - break; - case GL_LINEAR: - - SETfield(t->sampler_state.SQ_TEX_SAMPLER0.u32All, TEX_XYFilter_Linear, - XY_MAG_FILTER_shift, XY_MAG_FILTER_mask); - - break; - default: - break; - } -} - -static unsigned int r700GetWrapMode(GLenum wrapmode) -{ - switch(wrapmode) - { - case GL_REPEAT: - return SQ_TEX_WRAP; - case GL_CLAMP: - return SQ_TEX_CLAMP_HALF_BORDER; - case GL_CLAMP_TO_EDGE: - return SQ_TEX_CLAMP_LAST_TEXEL; - case GL_CLAMP_TO_BORDER: - return SQ_TEX_CLAMP_BORDER; - case GL_MIRRORED_REPEAT: - return SQ_TEX_MIRROR_ONCE_HALF_BORDER; - case GL_MIRROR_CLAMP_EXT: - return SQ_TEX_MIRROR; - case GL_MIRROR_CLAMP_TO_EDGE_EXT: - return SQ_TEX_MIRROR_ONCE_BORDER; - case GL_MIRROR_CLAMP_TO_BORDER_EXT: - return SQ_TEX_MIRROR_ONCE_LAST_TEXEL; - default: - _mesa_problem(NULL, "bad wrap mode in %s", __FUNCTION__); - return 0; - } -} -#endif /* to be enabled */ - -static void r700TexParameter(GLcontext * ctx, GLenum target, - struct gl_texture_object *texObj, - GLenum pname, const GLfloat * params) -{ - r700TexObjPtr t = (r700TexObjPtr) texObj->DriverData; -#if 0 /* to be enabled */ - switch (pname) - { - case GL_TEXTURE_MIN_FILTER: - r700SetTexMinFilter(t, texObj->MinFilter); - break; - case GL_TEXTURE_MAG_FILTER: - r700SetTexMagFilter(t, texObj->MagFilter); - break; - case GL_TEXTURE_MAX_ANISOTROPY_EXT: - - r700SetTexMinFilter(t, texObj->MinFilter); - r700SetTexMagFilter(t, texObj->MagFilter); - - break; - - case GL_TEXTURE_WRAP_S: - SETfield(t->sampler_state.SQ_TEX_SAMPLER0.u32All, r700GetWrapMode(texObj->WrapS), - SQ_TEX_SAMPLER_WORD0_0__CLAMP_X_shift, SQ_TEX_SAMPLER_WORD0_0__CLAMP_X_mask); - break; - case GL_TEXTURE_WRAP_T: - SETfield(t->sampler_state.SQ_TEX_SAMPLER0.u32All, r700GetWrapMode(texObj->WrapT), - CLAMP_Y_shift, CLAMP_Y_mask); - break; - case GL_TEXTURE_WRAP_R: - SETfield(t->sampler_state.SQ_TEX_SAMPLER0.u32All, r700GetWrapMode(texObj->WrapR), - CLAMP_Z_shift, CLAMP_Z_mask); - break; - - case GL_TEXTURE_BORDER_COLOR: - /* TODO : set border color regs before rendering. */ - SETfield(t->sampler_state.SQ_TEX_SAMPLER0.u32All, SQ_TEX_BORDER_COLOR_REGISTER, - BORDER_COLOR_TYPE_shift, BORDER_COLOR_TYPE_mask); - break; - - case GL_TEXTURE_BASE_LEVEL: - case GL_TEXTURE_MAX_LEVEL: - case GL_TEXTURE_MIN_LOD: - case GL_TEXTURE_MAX_LOD: - /* TODO : we do support this, add it later. */ - driSwapOutTextureObject((driTextureObject *) t); - break; - - case GL_DEPTH_TEXTURE_MODE: - if (!texObj->Image[0][texObj->BaseLevel]) - { - return; - } - if (texObj->Image[0][texObj->BaseLevel]->TexFormat->BaseFormat - == GL_DEPTH_COMPONENT) - { - /* TODO : r700SetDepthTexMode(texObj); */ - break; - } - else - { - /* If not depth texture, just return. */ - return; - } - - default: - return; - } -#endif /* to be enabled */ -} - -static void r700CompressedTexImage2D(GLcontext * ctx, GLenum target, - GLint level, GLint internalFormat, - GLint width, GLint height, GLint border, - GLsizei imageSize, const GLvoid * data, - struct gl_texture_object *texObj, - struct gl_texture_image *texImage) -{ -} - -static void r700CompressedTexSubImage2D(GLcontext * ctx, GLenum target, - GLint level, GLint xoffset, - GLint yoffset, GLsizei width, - GLsizei height, GLenum format, - GLsizei imageSize, const GLvoid * data, - struct gl_texture_object *texObj, - struct gl_texture_image *texImage) -{ -} - -static GLboolean r700UpdateTextureUnit(GLcontext * ctx, int unit) -{ - return GL_TRUE; -} - -static GLboolean r700EnableTextureRect(GLcontext * ctx, int unit) -{ - return GL_TRUE; -} - -static GLboolean r700EnableTexture3D(GLcontext * ctx, int unit) -{ - return GL_TRUE; -} - -static GLboolean r700EnableTextureCube(GLcontext * ctx, int unit) -{ - return GL_TRUE; -} - -static GLboolean r700UpdateTexture(GLcontext * ctx, int unit) -{ -#if 0 /* to be enabled */ - context_t *context = R700_CONTEXT(ctx); - R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(context->chipobj.pvChipObj); - - struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit]; - struct gl_texture_object *tObj = texUnit->_Current; - r700TexObjPtr t = (r700TexObjPtr) tObj->DriverData; - - if( r700->texture_states.textures[unit] != &(t->texture_state) ) - { - if(NULL != r700->texture_states.textures[unit]) - { /* there is an old one. */ - } - - r700->texture_states.textures[unit] = &(t->texture_state); - r700->texture_states.samplers[unit] = &(t->sampler_state); - driUpdateTextureLRU((driTextureObject *) t); /* XXX: should be locked! */ - } -#endif /* to be enabled */ - - return GL_TRUE; -} - -void r700UpdateTextureState(context_t * context) -{ -#if 0 /* to be enabled */ - GLboolean bRet; - GLuint unit; - GLcontext * ctx = context->ctx; - struct gl_texture_unit *texUnit; - - for (unit = 0; unit < 8; unit++) - { - texUnit = &ctx->Texture.Unit[unit]; - - if (texUnit->_ReallyEnabled & (TEXTURE_RECT_BIT)) - { - bRet = (r700EnableTextureRect(ctx, unit) && - r700UpdateTexture(ctx, unit)); - } - else if (texUnit->_ReallyEnabled & (TEXTURE_1D_BIT | TEXTURE_2D_BIT)) - { - bRet = (r700EnableTexture2D(ctx, unit) && - r700UpdateTexture(ctx, unit)); - } - else if (texUnit->_ReallyEnabled & (TEXTURE_3D_BIT)) - { - bRet = (r700EnableTexture3D(ctx, unit) && - r700UpdateTexture(ctx, unit)); - } - else if (texUnit->_ReallyEnabled & (TEXTURE_CUBE_BIT)) - { - bRet = (r700EnableTextureCube(ctx, unit) && - r700UpdateTexture(ctx, unit)); - } - else if (texUnit->_ReallyEnabled) - { - bRet = GL_FALSE; - } - else - { - bRet = GL_TRUE; - } - - if (!bRet) - { - _mesa_warning(ctx, "failed to update texture state for unit %d.\n", unit); - } - } -#endif /* to be enabled */ -} - -/** - * Ensure all enabled and complete textures are uploaded along with any buffers being used. - */ -GLboolean r700ValidateBuffers(GLcontext * ctx) -{ - /* TODO */ - - return radeon_revalidate_bos(ctx); -} - -void r700InitTextureFuncs(struct dd_function_table *functions) -{ - /* Note: we only plug in the functions we implement in the driver - * since _mesa_init_driver_functions() was already called. - */ - functions->ChooseTextureFormat = radeonChooseTextureFormat_mesa; - functions->TexImage1D = r700TexImage1D; - functions->TexImage2D = r700TexImage2D; - functions->TexImage3D = r700TexImage3D; - functions->TexSubImage1D = r700TexSubImage1D; - functions->TexSubImage2D = r700TexSubImage2D; - functions->TexSubImage3D = r700TexSubImage3D; - functions->NewTextureObject = r700NewTextureObject; - functions->BindTexture = r700BindTexture; - functions->DeleteTexture = r700DeleteTexture; - functions->IsTextureResident = driIsTextureResident; - - functions->TexParameter = r700TexParameter; - - functions->CompressedTexImage2D = r700CompressedTexImage2D; - functions->CompressedTexSubImage2D = r700CompressedTexSubImage2D; - - driInitTextureFormats(); -} - - diff --git a/src/mesa/drivers/dri/r600/r700_tex.h b/src/mesa/drivers/dri/r600/r700_tex.h deleted file mode 100644 index e322bbc47da..00000000000 --- a/src/mesa/drivers/dri/r600/r700_tex.h +++ /dev/null @@ -1,104 +0,0 @@ -/* - * Copyright (C) 2008-2009 Advanced Micro Devices, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included - * in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN - * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ - -/* - * Authors: - * Richard Li , - */ - -#ifndef __r700_TEX_H__ -#define __r700_TEX_H__ - -#include "texmem.h" - -#include "r700_chip.h" - -/* TODO : review this after texture load code. */ -#define R700_BLIT_WIDTH_BYTES 1024 -/* The BASE_ADDRESS and MIP_ADDRESS fields are 256-byte-aligned */ -#define R700_TEXTURE_ALIGNMENT_MASK 0x255 -/* Texel pitch is 8 alignment. */ -#define R700_TEXEL_PITCH_ALIGNMENT_MASK 0x7 - -#define R700_MAX_TEXTURE_UNITS 8 /* TODO : should be 16, lets make it work, review later */ - -typedef struct r700_tex_obj r700TexObj, *r700TexObjPtr; - -/* Texture object in locally shared texture space. - */ -struct r700_tex_obj -{ - driTextureObject base; - - /* r300 tex obj */ - GLuint bufAddr; - GLboolean image_override; - GLuint pitch; - GLuint filter; - GLuint filter_1; - GLuint pitch_reg; - GLuint size; - GLuint format; - GLuint offset; - GLuint unknown4; - GLuint unknown5; - GLboolean border_fallback; - GLuint tile_bits; - - /* r700 texture states */ - TEXTURE_STATE_STRUCT texture_state; - SAMPLER_STATE_STRUCT sampler_state; - - GLuint texel_pitch[6][RADEON_MAX_TEXTURE_LEVELS]; - GLuint level_offset[6][RADEON_MAX_TEXTURE_LEVELS]; - GLuint byte_per_texel; - GLuint src_width_in_pexel[6][RADEON_MAX_TEXTURE_LEVELS]; - GLuint src_hight_in_pexel[6][RADEON_MAX_TEXTURE_LEVELS]; - - GLuint my_dirty_images[6]; /* TODO : review */ -}; - -extern void r700SetTexBuffer(__DRIcontext *pDRICtx, GLint target, - __DRIdrawable *dPriv); - -extern void r700SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, - GLint format, __DRIdrawable *dPriv); - -extern void r700SetTexOffset(__DRIcontext *pDRICtx, GLint texname, - unsigned long long offset, GLint depth, - GLuint pitch); - -extern GLuint r700GetTexObjSize(void); -extern void r700UpdateTextureState(context_t * context); - -extern void r700SetTexOffset(__DRIcontext *pDRICtx, - GLint texname, - unsigned long long offset, - GLint depth, - GLuint pitch); - -extern void r700DestroyTexObj(context_t rmesa, r700TexObjPtr t); - -extern GLboolean r700ValidateBuffers(GLcontext * ctx); - -extern void r700InitTextureFuncs(struct dd_function_table *functions); - -#endif /* __r700_TEX_H__ */ diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h index 96bc6858765..43e705ee593 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.h +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h @@ -227,6 +227,19 @@ struct radeon_tex_obj { GLuint pp_txfilter_1; /* r300 */ + /* r700 texture states */ + GLuint SQ_TEX_RESOURCE0; + GLuint SQ_TEX_RESOURCE1; + GLuint SQ_TEX_RESOURCE2; + GLuint SQ_TEX_RESOURCE3; + GLuint SQ_TEX_RESOURCE4; + GLuint SQ_TEX_RESOURCE5; + GLuint SQ_TEX_RESOURCE6; + + GLuint SQ_TEX_SAMPLER0; + GLuint SQ_TEX_SAMPLER1; + GLuint SQ_TEX_SAMPLER2; + GLboolean border_fallback; diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c index e23d53c7a1a..355fa8683ae 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.c +++ b/src/mesa/drivers/dri/radeon/radeon_screen.c @@ -62,7 +62,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #elif RADEON_COMMON && defined(RADEON_COMMON_FOR_R600) #include "r600_context.h" #include "r700_driconf.h" /* +r6/r7 */ -#include "r700_tex.h" /* +r6/r7 */ +#include "r600_tex.h" /* +r6/r7 */ #endif #include "utils.h" @@ -405,13 +405,13 @@ static const __DRItexBufferExtension r300TexBufferExtension = { #if RADEON_COMMON && defined(RADEON_COMMON_FOR_R600) static const __DRItexOffsetExtension r600texOffsetExtension = { { __DRI_TEX_OFFSET, __DRI_TEX_OFFSET_VERSION }, - r700SetTexOffset, /* +r6/r7 */ + r600SetTexOffset, /* +r6/r7 */ }; static const __DRItexBufferExtension r600TexBufferExtension = { { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION }, - r700SetTexBuffer, /* +r6/r7 */ - r700SetTexBuffer2, /* +r6/r7 */ + r600SetTexBuffer, /* +r6/r7 */ + r600SetTexBuffer2, /* +r6/r7 */ }; #endif -- 2.30.2