From 1be3f54265d04ded28343c16614bee9c797b44ca Mon Sep 17 00:00:00 2001 From: Dmitry Selyutin Date: Mon, 29 Aug 2022 19:14:04 +0300 Subject: [PATCH] pysvp64asm: uncomment the remapped instructions --- src/openpower/sv/trans/svp64.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/openpower/sv/trans/svp64.py b/src/openpower/sv/trans/svp64.py index 1e15c799..dc8fe9b5 100644 --- a/src/openpower/sv/trans/svp64.py +++ b/src/openpower/sv/trans/svp64.py @@ -1255,7 +1255,7 @@ class SVP64Asm: # fiinally yield the svp64 prefix and the thingy. v3.0b opcode rc = '.' if rc_mode else '' - yield ".long 0x%08x # %s" % (svp64_prefix.insn.value, insn) + yield ".long 0x%08x" % svp64_prefix.insn.value log(v30b_op, v30b_newfields) # argh, sv.fmadds etc. need to be done manually if v30b_op == 'ffmadds': @@ -1314,6 +1314,7 @@ class SVP64Asm: if not v30b_op.endswith('.'): v30b_op += rc yield "%s %s" % (v30b_op, ", ".join(v30b_newfields)) + yield f"# {insn}" log("new v3.0B fields", v30b_op, v30b_newfields) def translate(self, lst): -- 2.30.2