From 1c67afbf5fac708e6043da6810616f0163b703d7 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sat, 1 May 2021 16:18:33 +0100 Subject: [PATCH] clean up MMU ROM test case --- src/openpower/decoder/power_enums.py | 4 +++- .../{test_issuer_mmu_rom.py => mmu_rom_cases.py} | 15 --------------- 2 files changed, 3 insertions(+), 16 deletions(-) rename src/openpower/test/mmu/{test_issuer_mmu_rom.py => mmu_rom_cases.py} (80%) diff --git a/src/openpower/decoder/power_enums.py b/src/openpower/decoder/power_enums.py index 5a29e8f1..44840821 100644 --- a/src/openpower/decoder/power_enums.py +++ b/src/openpower/decoder/power_enums.py @@ -476,6 +476,8 @@ if __name__ == '__main__': print(dir(Enum)) print(SPRfull.__members__['TAR']) for x in SPRfull: - print(x, x.value, str(x), x.name) + print("full", x, x.value, str(x), x.name) + for x in SPRreduced: + print("reduced", x, x.value, str(x), x.name) print("function", Function.ALU.name) diff --git a/src/openpower/test/mmu/test_issuer_mmu_rom.py b/src/openpower/test/mmu/mmu_rom_cases.py similarity index 80% rename from src/openpower/test/mmu/test_issuer_mmu_rom.py rename to src/openpower/test/mmu/mmu_rom_cases.py index 7d4e7ef1..75ba5617 100644 --- a/src/openpower/test/mmu/test_issuer_mmu_rom.py +++ b/src/openpower/test/mmu/mmu_rom_cases.py @@ -1,9 +1,5 @@ -from nmigen import Module, Signal -from soc.simple.test.test_runner import TestRunner from openpower.simulator.program import Program from openpower.endian import bigendian -import unittest - from openpower.test.common import (TestAccumulatorBase, skip_case) def b(x): @@ -55,14 +51,3 @@ class MMUTestCaseROM(TestAccumulatorBase): initial_regs, initial_sprs) - - -if __name__ == "__main__": - unittest.main(exit=False) - suite = unittest.TestSuite() - suite.addTest(TestRunner(MMUTestCaseROM().test_data, microwatt_mmu=True, - rom=default_mem)) - runner = unittest.TextTestRunner() - runner.run(suite) - -# soc/simple/test/test_runner.py -- 2.30.2