From 1c9ff5c5face02c914fe0d405619f52f2bd17fa4 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Fri, 27 Apr 2018 05:25:56 +0100
Subject: [PATCH]

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 harmonised_rvv_rvp/discussion.mdwn | 9 +++++++++
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 create mode 100644 harmonised_rvv_rvp/discussion.mdwn

diff --git a/harmonised_rvv_rvp/discussion.mdwn b/harmonised_rvv_rvp/discussion.mdwn
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+# Comments
+
+## enabling/disabling individual 8 and 16-bit operations in SIMD blocks
+
+* At the end of a loop, how are the three end operations of 4-wide 8-bit operations to be disabled (to avoid "SIMD considered harmful"?)
+* Likewise at the beginning of a loop, how are (up to) the first three operations to be disabled?
+* Likewise the last (and first) of 2-wide 16-bit operations?
+* What about predication within a 4-wide 8-bit group?
+* Likewise what about predication within a 2-wide 16-bit group?
-- 
2.30.2