From 1cf21cc813464ccfe29208d0b5383b21e6d0e6d1 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Mon, 22 Jan 2018 22:31:27 -0800 Subject: [PATCH] iris: actually save derived state --- src/gallium/drivers/iris/iris_context.h | 4 + src/gallium/drivers/iris/iris_program_cache.c | 8 +- src/gallium/drivers/iris/iris_state.c | 122 ++++++++++++------ 3 files changed, 91 insertions(+), 43 deletions(-) diff --git a/src/gallium/drivers/iris/iris_context.h b/src/gallium/drivers/iris/iris_context.h index aec2e30c68c..2c04cade2c1 100644 --- a/src/gallium/drivers/iris/iris_context.h +++ b/src/gallium/drivers/iris/iris_context.h @@ -180,6 +180,10 @@ void iris_init_state(struct iris_context *ice); void iris_init_program_cache(struct iris_context *ice); void iris_destroy_program_cache(struct iris_context *ice); void iris_print_program_cache(struct iris_context *ice); +unsigned iris_derived_program_state_size(enum iris_program_cache_id cache_id); +void iris_set_derived_program_state(const struct gen_device_info *devinfo, + enum iris_program_cache_id cache_id, + struct iris_compiled_shader *shader); bool iris_bind_cached_shader(struct iris_context *ice, enum iris_program_cache_id cache_id, const void *key); diff --git a/src/gallium/drivers/iris/iris_program_cache.c b/src/gallium/drivers/iris/iris_program_cache.c index eb5e3a644c5..1c707a78948 100644 --- a/src/gallium/drivers/iris/iris_program_cache.c +++ b/src/gallium/drivers/iris/iris_program_cache.c @@ -248,9 +248,12 @@ iris_upload_and_bind_shader(struct iris_context *ice, const void *assembly, const struct brw_stage_prog_data *prog_data) { + struct iris_screen *screen = (void *) ice->ctx.screen; + struct gen_device_info *devinfo = &screen->devinfo; struct iris_program_cache *cache = &ice->shaders.cache; struct iris_compiled_shader *shader = - ralloc(cache->table, struct iris_compiled_shader); + ralloc_size(cache->table, sizeof(struct iris_compiled_shader) + + iris_derived_program_state_size(cache_id)); const struct iris_compiled_shader *existing = find_existing_assembly(cache, assembly, prog_data->program_size); @@ -273,6 +276,9 @@ iris_upload_and_bind_shader(struct iris_context *ice, ralloc_steal(shader->prog_data, prog_data->param); ralloc_steal(shader->prog_data, prog_data->pull_param); + /* Store the 3DSTATE shader packets and other derived state. */ + iris_set_derived_program_state(devinfo, cache_id, shader); + struct keybox *keybox = make_keybox(cache, cache_id, key); _mesa_hash_table_insert(cache->table, keybox, shader); diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index 0260cb43f80..65201c1658d 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -1659,7 +1659,7 @@ iris_bind_compute_state(struct pipe_context *ctx, void *state) //ffs(stage_state->per_thread_scratch) - 11; \ #define INIT_THREAD_DISPATCH_FIELDS(pkt, prefix) \ - pkt.KernelStartPointer = prog_offset; \ + pkt.KernelStartPointer = shader->prog_offset; \ pkt.BindingTableEntryCount = prog_data->binding_table.size_bytes / 4; \ pkt.FloatingPointMode = prog_data->use_alt_mode; \ \ @@ -1672,16 +1672,13 @@ iris_bind_compute_state(struct pipe_context *ctx, void *state) pkt.Enable = true; static void -iris_create_vs_state(struct gen_device_info *devinfo, - struct brw_vs_prog_data *vs_prog_data, - unsigned prog_offset) +iris_set_vs_state(const struct gen_device_info *devinfo, + struct iris_compiled_shader *shader) { - struct brw_vue_prog_data *vue_prog_data = &vs_prog_data->base; - struct brw_stage_prog_data *prog_data = &vue_prog_data->base; + struct brw_stage_prog_data *prog_data = shader->prog_data; + struct brw_vue_prog_data *vue_prog_data = (void *) prog_data; - uint32_t vs_state[GENX(3DSTATE_VS_length)]; - - iris_pack_command(GENX(3DSTATE_VS), vs_state, vs) { + iris_pack_command(GENX(3DSTATE_VS), shader->derived_data, vs) { INIT_THREAD_DISPATCH_FIELDS(vs, Vertex); vs.MaximumNumberofThreads = devinfo->max_vs_threads - 1; vs.SIMD8DispatchEnable = true; @@ -1691,16 +1688,14 @@ iris_create_vs_state(struct gen_device_info *devinfo, } static void -iris_create_tcs_state(struct gen_device_info *devinfo, - struct brw_tcs_prog_data *tcs_prog_data, - unsigned prog_offset) +iris_set_tcs_state(const struct gen_device_info *devinfo, + struct iris_compiled_shader *shader) { - struct brw_vue_prog_data *vue_prog_data = &tcs_prog_data->base; - struct brw_stage_prog_data *prog_data = &vue_prog_data->base; - - uint32_t hs_state[GENX(3DSTATE_HS_length)]; + struct brw_stage_prog_data *prog_data = shader->prog_data; + struct brw_vue_prog_data *vue_prog_data = (void *) prog_data; + struct brw_tcs_prog_data *tcs_prog_data = (void *) prog_data; - iris_pack_command(GENX(3DSTATE_HS), hs_state, hs) { + iris_pack_command(GENX(3DSTATE_HS), shader->derived_data, hs) { INIT_THREAD_DISPATCH_FIELDS(hs, Vertex); hs.InstanceCount = tcs_prog_data->instances - 1; @@ -1710,16 +1705,14 @@ iris_create_tcs_state(struct gen_device_info *devinfo, } static void -iris_create_tes_state(struct gen_device_info *devinfo, - struct brw_tes_prog_data *tes_prog_data, - unsigned prog_offset) +iris_set_tes_state(const struct gen_device_info *devinfo, + struct iris_compiled_shader *shader) { - struct brw_vue_prog_data *vue_prog_data = &tes_prog_data->base; - struct brw_stage_prog_data *prog_data = &vue_prog_data->base; + struct brw_stage_prog_data *prog_data = shader->prog_data; + struct brw_vue_prog_data *vue_prog_data = (void *) prog_data; + struct brw_tes_prog_data *tes_prog_data = (void *) prog_data; - uint32_t ds_state[GENX(3DSTATE_DS_length)]; - - iris_pack_command(GENX(3DSTATE_DS), ds_state, ds) { + iris_pack_command(GENX(3DSTATE_DS), shader->derived_data, ds) { INIT_THREAD_DISPATCH_FIELDS(ds, Patch); ds.DispatchMode = DISPATCH_MODE_SIMD8_SINGLE_PATCH; @@ -1733,16 +1726,14 @@ iris_create_tes_state(struct gen_device_info *devinfo, } static void -iris_create_gs_state(struct gen_device_info *devinfo, - struct brw_gs_prog_data *gs_prog_data, - unsigned prog_offset) +iris_set_gs_state(const struct gen_device_info *devinfo, + struct iris_compiled_shader *shader) { - struct brw_vue_prog_data *vue_prog_data = &gs_prog_data->base; - struct brw_stage_prog_data *prog_data = &vue_prog_data->base; - - uint32_t gs_state[GENX(3DSTATE_GS_length)]; + struct brw_stage_prog_data *prog_data = shader->prog_data; + struct brw_vue_prog_data *vue_prog_data = (void *) prog_data; + struct brw_gs_prog_data *gs_prog_data = (void *) prog_data; - iris_pack_command(GENX(3DSTATE_GS), gs_state, gs) { + iris_pack_command(GENX(3DSTATE_GS), shader->derived_data, gs) { INIT_THREAD_DISPATCH_FIELDS(gs, Vertex); gs.OutputVertexSize = gs_prog_data->output_vertex_size_hwords * 2 - 1; @@ -1779,14 +1770,14 @@ iris_create_gs_state(struct gen_device_info *devinfo, } static void -iris_create_fs_state(struct gen_device_info *devinfo, - struct brw_wm_prog_data *wm_prog_data, - unsigned prog_offset) +iris_set_fs_state(const struct gen_device_info *devinfo, + struct iris_compiled_shader *shader) { - struct brw_stage_prog_data *prog_data = &wm_prog_data->base; + struct brw_stage_prog_data *prog_data = shader->prog_data; + struct brw_wm_prog_data *wm_prog_data = (void *) shader->prog_data; - uint32_t ps_state[GENX(3DSTATE_PS_length)]; - uint32_t psx_state[GENX(3DSTATE_PS_EXTRA_length)]; + uint32_t *ps_state = (void *) shader->derived_data; + uint32_t *psx_state = ps_state + GENX(3DSTATE_PS_length); iris_pack_command(GENX(3DSTATE_PS), ps_state, ps) { ps.VectorMaskEnable = true; @@ -1827,11 +1818,11 @@ iris_create_fs_state(struct gen_device_info *devinfo, brw_wm_prog_data_dispatch_grf_start_reg(wm_prog_data, ps, 2); ps.KernelStartPointer0 = - prog_offset + brw_wm_prog_data_prog_offset(wm_prog_data, ps, 0); + shader->prog_offset + brw_wm_prog_data_prog_offset(wm_prog_data, ps, 0); ps.KernelStartPointer1 = - prog_offset + brw_wm_prog_data_prog_offset(wm_prog_data, ps, 1); + shader->prog_offset + brw_wm_prog_data_prog_offset(wm_prog_data, ps, 1); ps.KernelStartPointer2 = - prog_offset + brw_wm_prog_data_prog_offset(wm_prog_data, ps, 2); + shader->prog_offset + brw_wm_prog_data_prog_offset(wm_prog_data, ps, 2); } iris_pack_command(GENX(3DSTATE_PS_EXTRA), psx_state, psx) { @@ -1859,6 +1850,53 @@ iris_create_fs_state(struct gen_device_info *devinfo, } } +unsigned +iris_derived_program_state_size(enum iris_program_cache_id cache_id) +{ + assert(cache_id <= IRIS_CACHE_CS); + + static const unsigned dwords[] = { + [IRIS_CACHE_VS] = GENX(3DSTATE_VS_length), + [IRIS_CACHE_TCS] = GENX(3DSTATE_HS_length), + [IRIS_CACHE_TES] = GENX(3DSTATE_DS_length), + [IRIS_CACHE_GS] = GENX(3DSTATE_GS_length), + [IRIS_CACHE_FS] = + GENX(3DSTATE_PS_length) + GENX(3DSTATE_PS_EXTRA_length), + [IRIS_CACHE_CS] = 0, + [IRIS_CACHE_BLORP_BLIT] = 0, + }; + + return sizeof(uint32_t) * dwords[cache_id]; +} + +void +iris_set_derived_program_state(const struct gen_device_info *devinfo, + enum iris_program_cache_id cache_id, + struct iris_compiled_shader *shader) +{ + switch (cache_id) { + case IRIS_CACHE_VS: + iris_set_vs_state(devinfo, shader); + break; + case IRIS_CACHE_TCS: + iris_set_tcs_state(devinfo, shader); + break; + case IRIS_CACHE_TES: + iris_set_tes_state(devinfo, shader); + break; + case IRIS_CACHE_GS: + iris_set_gs_state(devinfo, shader); + break; + case IRIS_CACHE_FS: + iris_set_fs_state(devinfo, shader); + break; + case IRIS_CACHE_CS: + break; + default: + break; + } +} + void iris_destroy_state(struct iris_context *ice) { -- 2.30.2