From 1d3038e8b1e462bb6c4146cf8a5e3ba652aef5c6 Mon Sep 17 00:00:00 2001 From: Dmitry Selyutin Date: Mon, 12 Sep 2022 22:28:52 +0300 Subject: [PATCH] power_insn: refactor RM mapping --- src/openpower/decoder/power_insn.py | 31 ++++++++++++++++++++--------- 1 file changed, 22 insertions(+), 9 deletions(-) diff --git a/src/openpower/decoder/power_insn.py b/src/openpower/decoder/power_insn.py index 58c759e7..1917dcf8 100644 --- a/src/openpower/decoder/power_insn.py +++ b/src/openpower/decoder/power_insn.py @@ -1401,12 +1401,7 @@ class Extra3(Extra): self[key].assign(value) -class RM(_Mapping): - class Mode(Mode): - normal: NormalMode - ldst_imm: LDSTImmMode - ldst_idx: LDSTIdxMode - +class RMBase(_Mapping): _: _Field = range(24) mmode: _Field = (0,) mask: _Field = range(1, 4) @@ -1421,6 +1416,24 @@ class RM(_Mapping): extra3: Extra3.remap(range(10, 19)) +class RMNormal(RMBase): + mode: NormalMode + + +class RMLDSTImm(RMBase): + mode: LDSTImmMode + + +class RMLDSTIdx(RMBase): + mode: LDSTIdxMode + + +class RM(RMBase): + normal: RMNormal + ldst_imm: RMLDSTImm + ldst_idx: RMLDSTIdx + + class SVP64Instruction(PrefixedInstruction): """SVP64 instruction: https://libre-soc.org/openpower/sv/svp64/""" class Prefix(PrefixedInstruction.Prefix): @@ -1462,7 +1475,7 @@ class SVP64Instruction(PrefixedInstruction): return (self.prefix.rm.mode, "crop") elif record.svp64.mode is _SVMode.NORMAL: - mode = mode.normal + mode = self.prefix.rm.normal.mode if sel == 0b00: if mode[2] == 0b0: mode = mode.simple @@ -1496,7 +1509,7 @@ class SVP64Instruction(PrefixedInstruction): else: mode = mode.prrc0 elif record.svp64.mode is _SVMode.LDST_IMM: - mode = mode.ldst_imm + mode = self.prefix.rm.ldst_imm.mode if sel == 0b00: if mode[2] == 0b0: mode = mode.simple @@ -1515,7 +1528,7 @@ class SVP64Instruction(PrefixedInstruction): else: mode = mode.prrc0 elif record.svp64.mode is _SVMode.LDST_IMM: - mode = mode.ldst_idx + mode = self.prefix.rm.ldst_idx.mode if mode.sel == 0b00: mode = mode.simple elif mode.sel == 0b01: -- 2.30.2