From 1d3e6ed315efea1a646ce13b57a5c1dc849d6e7e Mon Sep 17 00:00:00 2001 From: Renlin Li Date: Fri, 2 Oct 2015 11:55:04 +0000 Subject: [PATCH] [PATCH][AARCH64][PR66776]Add cmovdi_insn_uxtw pattern. gcc/ 2015-10-02 Renlin Li PR target/66776 * config/aarch64/aarch64.md (cmovdi_insn_uxtw): New pattern. gcc/testsuite/ 2015-10-02 Renlin Li PR target/66776 * gcc.target/aarch64/pr66776.c: New. From-SVN: r228384 --- gcc/ChangeLog | 5 +++++ gcc/config/aarch64/aarch64.md | 12 ++++++++++++ gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/aarch64/pr66776.c | 10 ++++++++++ 4 files changed, 32 insertions(+) create mode 100644 gcc/testsuite/gcc.target/aarch64/pr66776.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 91c99729879..c71a020ee50 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2015-10-02 Renlin Li + + PR target/66776 + * config/aarch64/aarch64.md (cmovdi_insn_uxtw): New pattern. + 2015-10-02 Kyrylo Tkachov PR rtl-optimization/67786 diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index c3cd58d7e4e..20681cda431 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -3010,6 +3010,18 @@ [(set_attr "type" "csel")] ) +(define_insn "*cmovdi_insn_uxtw" + [(set (match_operand:DI 0 "register_operand" "=r") + (if_then_else:DI + (match_operator 1 "aarch64_comparison_operator" + [(match_operand 2 "cc_register" "") (const_int 0)]) + (zero_extend:DI (match_operand:SI 3 "register_operand" "r")) + (zero_extend:DI (match_operand:SI 4 "register_operand" "r"))))] + "" + "csel\\t%w0, %w3, %w4, %m1" + [(set_attr "type" "csel")] +) + (define_insn "*cmov_insn" [(set (match_operand:GPF 0 "register_operand" "=w") (if_then_else:GPF diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 169c0c4e218..87bcd8b1256 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-10-02 Renlin Li + + PR target/66776 + * gcc.target/aarch64/pr66776.c: New. + 2015-10-02 Eric Botcazou * gnat.dg/warn13.adb: New test. diff --git a/gcc/testsuite/gcc.target/aarch64/pr66776.c b/gcc/testsuite/gcc.target/aarch64/pr66776.c new file mode 100644 index 00000000000..a5c83b4739c --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/pr66776.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 --save-temps" } */ + +unsigned long long +foo (unsigned int a, unsigned int b, unsigned int c) +{ + return a ? b : c; +} + +/* { dg-final { scan-assembler-not "uxtw" } } */ -- 2.30.2