From 1d54957d869cfd28c0239fbe5affd760b788e6b3 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Fri, 5 Mar 2021 13:53:47 +0000 Subject: [PATCH] add trivial LD/ST redirectors into RADIX ISACaller --- src/soc/decoder/isa/caller.py | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/soc/decoder/isa/caller.py b/src/soc/decoder/isa/caller.py index 2c0d0f42..4063dac8 100644 --- a/src/soc/decoder/isa/caller.py +++ b/src/soc/decoder/isa/caller.py @@ -225,10 +225,13 @@ class RADIX: pte = self._walk_tree() # use pte to caclculate phys address - #mem.ld(address,width,swap,check_in_mem) + return self.mem.ld(address, width, swap, check_in_mem) # TODO implement - # def st(self, addr, v, width=8, swap=True): + def st(self, addr, v, width=8, swap=True): + # use pte to caclculate phys address (addr) + return self.mem.st(addr, v, width, swap) + # def memassign(self, addr, sz, val): def _next_level(self): return True -- 2.30.2