From 1d9771f574e67c66b765e836420bb12586e7709b Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Mon, 27 Apr 2015 13:42:32 +0800 Subject: [PATCH] spiflash: use SoC defines, add write_to_flash function --- software/include/base/spiflash.h | 1 + software/libbase/spiflash.c | 54 +++++++++++++++++++++----------- targets/kc705.py | 2 ++ 3 files changed, 39 insertions(+), 18 deletions(-) diff --git a/software/include/base/spiflash.h b/software/include/base/spiflash.h index 2708cdb3..ce5a1d9b 100644 --- a/software/include/base/spiflash.h +++ b/software/include/base/spiflash.h @@ -3,5 +3,6 @@ void write_to_flash_page(unsigned int addr, unsigned char *c, unsigned int len); void erase_flash_sector(unsigned int addr); +void write_to_flash(unsigned int addr, unsigned char *c, unsigned int len); #endif /* __SPIFLASH_H */ diff --git a/software/libbase/spiflash.c b/software/libbase/spiflash.c index b2080248..3d4e3204 100644 --- a/software/libbase/spiflash.c +++ b/software/libbase/spiflash.c @@ -1,25 +1,20 @@ #include -#include +#if (defined CSR_SPIFLASH_BASE && defined SPIFLASH_PAGE_SIZE) -#ifdef CSR_SPIFLASH_BASE +#include -#define PAGE_PROGRAM_CMD (0x02) -#define WRDI_CMD (0x04) -#define RDSR_CMD (0x05) -#define WREN_CMD (0x06) -#define SE_CMD (0x20) +#define PAGE_PROGRAM_CMD (0x02) +#define WRDI_CMD (0x04) +#define RDSR_CMD (0x05) +#define WREN_CMD (0x06) +#define SE_CMD (0x20) -#define BITBANG_CLK (1 << 1) +#define BITBANG_CLK (1 << 1) #define BITBANG_CS_N (1 << 2) #define BITBANG_DQ_INPUT (1 << 3) -#define SR_WIP (1) - -#define PAGE_SIZE (256) -#define PAGE_MASK (PAGE_SIZE - 1) -#define SECTOR_SIZE (4096) -#define SECTOR_MASK (SECTOR_SIZE - 1) +#define SR_WIP (1) static void flash_write_byte(unsigned char b); static void flash_write_addr(unsigned int addr); @@ -76,7 +71,7 @@ static void wait_for_device_ready(void) void erase_flash_sector(unsigned int addr) { - unsigned int sector_addr = addr & ~(SECTOR_MASK); + unsigned int sector_addr = addr & ~(SPIFLASH_SECTOR_SIZE - 1); spiflash_bitbang_en_write(1); @@ -98,8 +93,8 @@ void write_to_flash_page(unsigned int addr, unsigned char *c, unsigned int len) { unsigned int i; - if(len > PAGE_SIZE) - len = PAGE_SIZE; + if(len > SPIFLASH_PAGE_SIZE) + len = SPIFLASH_PAGE_SIZE; spiflash_bitbang_en_write(1); @@ -120,4 +115,27 @@ void write_to_flash_page(unsigned int addr, unsigned char *c, unsigned int len) spiflash_bitbang_en_write(0); } -#endif +#define SPIFLASH_PAGE_MASK (SPIFLASH_PAGE_SIZE - 1) + +void write_to_flash(unsigned int addr, unsigned char *c, unsigned int len) +{ + unsigned int written = 0; + + if(addr & SPIFLASH_PAGE_MASK) { + written = min(SPIFLASH_PAGE_SIZE - (addr & SPIFLASH_PAGE_MASK), len); + write_to_flash_page(addr, c, written); + c += written; + addr += written; + len -= written; + } + + while(len > 0) { + written = min(len, SPIFLASH_PAGE_SIZE); + write_to_flash_page(addr, c, written); + c += written; + addr += written; + len -= written; + } +} + +#endif /* CSR_SPIFLASH_BASE && SPIFLASH_PAGE_SIZE */ diff --git a/targets/kc705.py b/targets/kc705.py index b0d477fd..4cd792d6 100644 --- a/targets/kc705.py +++ b/targets/kc705.py @@ -98,6 +98,8 @@ class BaseSoC(SDRAMSoC): i_CLK=0, i_GSR=0, i_GTS=0, i_KEYCLEARB=0, i_PACK=0, i_USRCCLKO=spiflash_pads.clk, i_USRCCLKTS=0, i_USRDONEO=1, i_USRDONETS=1) self.submodules.spiflash = spiflash.SpiFlash(spiflash_pads, dummy=11, div=2) + self.add_constant("SPIFLASH_PAGE_SIZE", 256) + self.add_constant("SPIFLASH_SECTOR_SIZE", 0x10000) self.flash_boot_address = 0xb00000 self.register_rom(self.spiflash.bus) -- 2.30.2