From 1df559c7062b62a8b72b70d40d65da99667a2183 Mon Sep 17 00:00:00 2001 From: Andrew Zonenberg Date: Wed, 6 Apr 2016 22:40:25 -0700 Subject: [PATCH] Added GP_RINGOSC primitive --- techlibs/greenpak4/cells_sim.v | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/techlibs/greenpak4/cells_sim.v b/techlibs/greenpak4/cells_sim.v index f013d9b71..d3a176b88 100644 --- a/techlibs/greenpak4/cells_sim.v +++ b/techlibs/greenpak4/cells_sim.v @@ -75,6 +75,9 @@ module GP_LFOSC(input PWRDN, output reg CLKOUT); initial CLKOUT = 0; + //auto powerdown not implemented for simulation + //output dividers not implemented for simulation + always begin if(PWRDN) clkout = 0; @@ -87,6 +90,29 @@ module GP_LFOSC(input PWRDN, output reg CLKOUT); endmodule +module GP_RINGOSC(input PWRDN, output reg CLKOUT); + + parameter PWRDN_EN = 0; + parameter AUTO_PWRDN = 0; + parameter OUT_DIV = 1; + + initial CLKOUT = 0; + + //output dividers not implemented for simulation + //auto powerdown not implemented for simulation + + always begin + if(PWRDN) + clkout = 0; + else begin + //half period of 27 MHz + #18.518; + clkout = ~clkout; + end + end + +endmodule + module GP_COUNT8(input CLK, input wire RST, output reg OUT); parameter RESET_MODE = "RISING"; -- 2.30.2