From 1eafe7e12d4ad3b1795e9db717e931fa578fbbdb Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 7 Jun 2020 00:05:05 +0100 Subject: [PATCH] whitespace --- index.mdwn | 39 +++++++++++++++++++-------------------- 1 file changed, 19 insertions(+), 20 deletions(-) diff --git a/index.mdwn b/index.mdwn index 6959553b7..a4a87f69d 100644 --- a/index.mdwn +++ b/index.mdwn @@ -81,27 +81,28 @@ below. If there is anything else, just get in touch on the list, there is plenty to do. 1. First, join the -[mailing list](http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev), -introduce yourself (people will happily say "hello" back"). Read through -[recent posts](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/) -and the [[charter]], and let everyone know, on the list that you're -happy with it and agree to it. -2. The next thing you should do is read through the [bugs -list](http://bugs.libre-riscv.org) and see if there are any bugs that -pique your interest. A fascinating way to do that is to view the -[dependency graph](https://bugs.libre-soc.org/showdependencygraph.cgi?id=1&display=web&rankdir=LR) -3. After that, go ahead and take a look at the [git repositories](https://git.libre-riscv.org). - + [mailing list](http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev), + introduce yourself (people will happily say "hello" back"). Read through + [recent posts](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/) + and the [[charter]], and let everyone know, on the list that you're + happy with it and agree to it. +2. The next thing you should do is read through the + [bugs list](http://bugs.libre-riscv.org) and + see if there are any bugs that pique your interest. + A fascinating way to do that is to view the + [dependency graph](https://bugs.libre-soc.org/showdependencygraph.cgi?id=1&display=web&rankdir=LR) +3. After that, go ahead and take a look at the + [git repositories](https://git.libre-riscv.org). 4. If you plan to do HDL work, you should familiarize yourself with our - [[HDL_workflow]]. If you would like to help with the ASIC layout, - see [[HDL_workflow/coriolis2]] + [[HDL_workflow]]. If you would like to help with the ASIC layout, + see [[HDL_workflow/coriolis2]] 5. We do have funding available (see [[nlnet]]) upon completion of issues - -we are also working on procuring more funding which gets the project to -nanometre scale tapeout. + we are also working on procuring more funding which gets the project to + nanometre scale tapeout. 6. After all this, if you feel that Libre-SOC is a something - that you would like to contribute to, add yourself to the - [current_members](about_us) page, fill in some information about yourself, - and join the mailing list and say hello. + that you would like to contribute to, add yourself to the + [current_members](about_us) page, fill in some information about yourself, + and join the mailing list and say hello. Also note that you can edit this wiki. You can experiment in the [[Sandbox]]. @@ -126,8 +127,6 @@ Here is an example process of how to play with the soc code: python3 soc/src/soc/decoder/power_decoder.py yosys -p "read_ilang decoder.il; show dec31" - - ## How can I learn? The whole purpose of this project is to be a learning environment as well -- 2.30.2