From 1eeed24eb2000486a3abab4395c735c385925813 Mon Sep 17 00:00:00 2001 From: Jeffrey A Law Date: Tue, 21 Apr 1998 11:07:59 +0000 Subject: [PATCH] mips.c (block_move_loop): Test Pmode == DImode instead of TARGET_MIPS64. * mips.c (block_move_loop): Test Pmode == DImode instead of TARGET_MIPS64. (expand_block_move, save_restore_insns): Likewise. (function_prologue, mips_expand_prologue): Likewise. (mips_expand_epilogue): Likewise. * mips.h (POINTER_SIZE): Allow specific targets to override. (Pmode): Allow specific targets to override. (FUNCTION_PROFILER): Test Pmode == DImode instead of TARGET_MIPS64 (POINTER_BOUNDARY, FUNCTION_MODE): Likewise. (TRAMPOLINE_TEMPLATE, TRAMPOLINE_SIZE): Likewise. (TRAMPOLINE_ALIGNMENT, INITIALIZE_TRAMPOLINE): Likewise. (CASE_VECTOR_MODE, ASM_OUTPUT_ADDR_VEC_ELT): Likewise. (ASM_OUTPUT_ADDR_DIFF_ELT, SIZE_TYPE, PTRDIFF_TYPE): Likewise. * mips.md (indirect, tablejump & casesi support): Test for Pmode == DImode instead of TARGET_MIPS64. (call patterns): Likewise. From-SVN: r19354 --- gcc/ChangeLog | 19 ++++++++++++++++ gcc/config/mips/mips.c | 46 ++++++++++++++++++------------------- gcc/config/mips/mips.h | 34 +++++++++++++++------------- gcc/config/mips/mips.md | 50 ++++++++++++++++++++--------------------- 4 files changed, 86 insertions(+), 63 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 77bee69f633..9add7255519 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,22 @@ +Tue Apr 21 12:05:32 1998 Jeffrey A Law (law@cygnus.com) + + * mips.c (block_move_loop): Test Pmode == DImode instead of + TARGET_MIPS64. + (expand_block_move, save_restore_insns): Likewise. + (function_prologue, mips_expand_prologue): Likewise. + (mips_expand_epilogue): Likewise. + * mips.h (POINTER_SIZE): Allow specific targets to override. + (Pmode): Allow specific targets to override. + (FUNCTION_PROFILER): Test Pmode == DImode instead of TARGET_MIPS64 + (POINTER_BOUNDARY, FUNCTION_MODE): Likewise. + (TRAMPOLINE_TEMPLATE, TRAMPOLINE_SIZE): Likewise. + (TRAMPOLINE_ALIGNMENT, INITIALIZE_TRAMPOLINE): Likewise. + (CASE_VECTOR_MODE, ASM_OUTPUT_ADDR_VEC_ELT): Likewise. + (ASM_OUTPUT_ADDR_DIFF_ELT, SIZE_TYPE, PTRDIFF_TYPE): Likewise. + * mips.md (indirect, tablejump & casesi support): Test for + Pmode == DImode instead of TARGET_MIPS64. + (call patterns): Likewise. + Tue Apr 21 09:43:55 1998 Kaveh R. Ghazi * objc/sendmsg.c: Define gen_rtx_MEM() to 1, as is already done diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 4f8f3e5370f..e9e9cf40844 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -3008,7 +3008,7 @@ block_move_loop (dest_reg, src_reg, bytes, align, orig_dest, orig_src) if (bytes > 0x7fff) { - if (TARGET_LONG64) + if (Pmode == DImode) { emit_insn (gen_movdi (final_src, bytes_rtx)); emit_insn (gen_adddi3 (final_src, final_src, src_reg)); @@ -3021,7 +3021,7 @@ block_move_loop (dest_reg, src_reg, bytes, align, orig_dest, orig_src) } else { - if (TARGET_LONG64) + if (Pmode == DImode) emit_insn (gen_adddi3 (final_src, src_reg, bytes_rtx)); else emit_insn (gen_addsi3 (final_src, src_reg, bytes_rtx)); @@ -3031,7 +3031,7 @@ block_move_loop (dest_reg, src_reg, bytes, align, orig_dest, orig_src) bytes_rtx = GEN_INT (MAX_MOVE_BYTES); emit_insn (gen_movstrsi_internal (dest_mem, src_mem, bytes_rtx, align_rtx)); - if (TARGET_LONG64) + if (Pmode == DImode) { emit_insn (gen_adddi3 (src_reg, src_reg, bytes_rtx)); emit_insn (gen_adddi3 (dest_reg, dest_reg, bytes_rtx)); @@ -3143,7 +3143,7 @@ expand_block_move (operands) bytes -= leftover; - if (TARGET_LONG64) + if (Pmode == DImode) { emit_insn (gen_iordi3 (temp, src_reg, dest_reg)); emit_insn (gen_anddi3 (temp, temp, GEN_INT (UNITS_PER_WORD-1))); @@ -5733,7 +5733,7 @@ save_restore_insns (store_p, large_reg, large_offset, file) base_offset = large_offset; if (file == (FILE *)0) { - if (TARGET_LONG64) + if (Pmode == DImode) insn = emit_insn (gen_adddi3 (base_reg_rtx, large_reg, stack_pointer_rtx)); else insn = emit_insn (gen_addsi3 (base_reg_rtx, large_reg, stack_pointer_rtx)); @@ -5742,7 +5742,7 @@ save_restore_insns (store_p, large_reg, large_offset, file) } else fprintf (file, "\t%s\t%s,%s,%s\n", - TARGET_LONG64 ? "daddu" : "addu", + Pmode == DImode ? "daddu" : "addu", reg_names[MIPS_TEMP2_REGNUM], reg_names[REGNO (large_reg)], reg_names[STACK_POINTER_REGNUM]); @@ -5780,7 +5780,7 @@ save_restore_insns (store_p, large_reg, large_offset, file) RTX_FRAME_RELATED_P (insn) = 1; } - if (TARGET_LONG64) + if (Pmode == DImode) insn = emit_insn (gen_adddi3 (base_reg_rtx, base_reg_rtx, stack_pointer_rtx)); else insn = emit_insn (gen_addsi3 (base_reg_rtx, base_reg_rtx, stack_pointer_rtx)); @@ -5792,7 +5792,7 @@ save_restore_insns (store_p, large_reg, large_offset, file) reg_names[MIPS_TEMP2_REGNUM], (long)base_offset, (long)base_offset, - TARGET_LONG64 ? "daddu" : "addu", + Pmode == DImode ? "daddu" : "addu", reg_names[MIPS_TEMP2_REGNUM], reg_names[MIPS_TEMP2_REGNUM], reg_names[STACK_POINTER_REGNUM]); @@ -5947,7 +5947,7 @@ save_restore_insns (store_p, large_reg, large_offset, file) base_offset = large_offset; if (file == (FILE *)0) { - if (TARGET_LONG64) + if (Pmode == DImode) insn = emit_insn (gen_adddi3 (base_reg_rtx, large_reg, stack_pointer_rtx)); else insn = emit_insn (gen_addsi3 (base_reg_rtx, large_reg, stack_pointer_rtx)); @@ -5956,7 +5956,7 @@ save_restore_insns (store_p, large_reg, large_offset, file) } else fprintf (file, "\t%s\t%s,%s,%s\n", - TARGET_LONG64 ? "daddu" : "addu", + Pmode == DImode ? "daddu" : "addu", reg_names[MIPS_TEMP2_REGNUM], reg_names[REGNO (large_reg)], reg_names[STACK_POINTER_REGNUM]); @@ -5996,7 +5996,7 @@ save_restore_insns (store_p, large_reg, large_offset, file) if (store_p) RTX_FRAME_RELATED_P (insn) = 1; - if (TARGET_LONG64) + if (Pmode == DImode) insn = emit_insn (gen_adddi3 (base_reg_rtx, base_reg_rtx, stack_pointer_rtx)); else insn = emit_insn (gen_addsi3 (base_reg_rtx, base_reg_rtx, stack_pointer_rtx)); @@ -6008,7 +6008,7 @@ save_restore_insns (store_p, large_reg, large_offset, file) reg_names[MIPS_TEMP2_REGNUM], (long)base_offset, (long)base_offset, - TARGET_LONG64 ? "daddu" : "addu", + Pmode == DImode ? "daddu" : "addu", reg_names[MIPS_TEMP2_REGNUM], reg_names[MIPS_TEMP2_REGNUM], reg_names[STACK_POINTER_REGNUM]); @@ -6242,7 +6242,7 @@ function_prologue (file, size) if (tsize > 0) { fprintf (file, "\t%s\t%s,%s,%ld\n", - (TARGET_LONG64 ? "dsubu" : "subu"), + (Pmode == DImode ? "dsubu" : "subu"), sp_str, sp_str, tsize); fprintf (file, "\t.cprestore %ld\n", current_frame_info.args_size); } @@ -6403,7 +6403,7 @@ mips_expand_prologue () if (TARGET_MIPS16 && current_function_outgoing_args_size != 0) { rtx incr = GEN_INT (current_function_outgoing_args_size); - if (TARGET_LONG64) + if (Pmode == DImode) insn = emit_insn (gen_adddi3 (hard_frame_pointer_rtx, stack_pointer_rtx, incr)); @@ -6412,7 +6412,7 @@ mips_expand_prologue () stack_pointer_rtx, incr)); } - else if (TARGET_LONG64) + else if (Pmode == DImode) insn = emit_insn (gen_movdi (hard_frame_pointer_rtx, stack_pointer_rtx)); else insn = emit_insn (gen_movsi (hard_frame_pointer_rtx, stack_pointer_rtx)); @@ -6501,7 +6501,7 @@ mips_expand_prologue () tsize_rtx = tmp_rtx; } - if (TARGET_LONG64) + if (Pmode == DImode) insn = emit_insn (gen_subdi3 (stack_pointer_rtx, stack_pointer_rtx, tsize_rtx)); else @@ -6528,7 +6528,7 @@ mips_expand_prologue () reg_rtx = gen_rtx (REG, Pmode, 3); emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx); emit_move_insn (reg_rtx, tsize_rtx); - if (TARGET_LONG64) + if (Pmode == DImode) emit_insn (gen_subdi3 (hard_frame_pointer_rtx, hard_frame_pointer_rtx, reg_rtx)); @@ -6557,7 +6557,7 @@ mips_expand_prologue () if (current_function_outgoing_args_size != 0) { rtx incr = GEN_INT (current_function_outgoing_args_size); - if (TARGET_LONG64) + if (Pmode == DImode) insn = emit_insn (gen_adddi3 (hard_frame_pointer_rtx, hard_frame_pointer_rtx, incr)); @@ -6570,7 +6570,7 @@ mips_expand_prologue () else if (TARGET_MIPS16 && current_function_outgoing_args_size != 0) { rtx incr = GEN_INT (current_function_outgoing_args_size); - if (TARGET_LONG64) + if (Pmode == DImode) insn = emit_insn (gen_adddi3 (hard_frame_pointer_rtx, stack_pointer_rtx, incr)); @@ -6579,7 +6579,7 @@ mips_expand_prologue () stack_pointer_rtx, incr)); } - else if (TARGET_LONG64) + else if (Pmode == DImode) insn = emit_insn (gen_movdi (hard_frame_pointer_rtx, stack_pointer_rtx)); else insn = emit_insn (gen_movsi (hard_frame_pointer_rtx, stack_pointer_rtx)); @@ -6749,7 +6749,7 @@ mips_expand_epilogue () rtx g6_rtx = gen_rtx (REG, Pmode, GP_REG_FIRST + 6); emit_move_insn (g6_rtx, GEN_INT (tsize)); - if (TARGET_LONG64) + if (Pmode == DImode) emit_insn (gen_adddi3 (hard_frame_pointer_rtx, hard_frame_pointer_rtx, g6_rtx)); @@ -6764,7 +6764,7 @@ mips_expand_epilogue () tsize_rtx = GEN_INT (tsize); } - if (TARGET_LONG64) + if (Pmode == DImode) emit_insn (gen_movdi (stack_pointer_rtx, hard_frame_pointer_rtx)); else emit_insn (gen_movsi (stack_pointer_rtx, hard_frame_pointer_rtx)); @@ -6787,7 +6787,7 @@ mips_expand_epilogue () abort (); emit_insn (gen_blockage ()); - if (TARGET_LONG64 && tsize != 0) + if (Pmode == DImode && tsize != 0) emit_insn (gen_adddi3 (stack_pointer_rtx, stack_pointer_rtx, tsize_rtx)); else if (tsize != 0) diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 4de5f5c66a0..8e535616097 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -1314,10 +1314,12 @@ do { \ /* Width in bits of a pointer. See also the macro `Pmode' defined below. */ +#ifndef POINTER_SIZE #define POINTER_SIZE (TARGET_LONG64 ? 64 : 32) +#endif /* Allocation boundary (in *bits*) for storing pointers in memory. */ -#define POINTER_BOUNDARY (TARGET_LONG64 ? 64 : 32) +#define POINTER_BOUNDARY (Pmode == DImode ? 64 : 32) /* Allocation boundary (in *bits*) for storing arguments in argument list. */ #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32) @@ -2495,7 +2497,7 @@ typedef struct mips_args { TARGET_64BIT ? "dsubu" : "subu", \ reg_names[STACK_POINTER_REGNUM], \ reg_names[STACK_POINTER_REGNUM], \ - TARGET_LONG64 ? 16 : 8); \ + Pmode == DImode ? 16 : 8); \ fprintf (FILE, "\t.set\treorder\n"); \ fprintf (FILE, "\t.set\tat\n"); \ } @@ -2524,7 +2526,7 @@ typedef struct mips_args { fprintf (STREAM, "\t.word\t0x03e00821\t\t# move $1,$31\n"); \ fprintf (STREAM, "\t.word\t0x04110001\t\t# bgezal $0,.+8\n"); \ fprintf (STREAM, "\t.word\t0x00000000\t\t# nop\n"); \ - if (TARGET_LONG64) \ + if (Pmode == DImode) \ { \ fprintf (STREAM, "\t.word\t0xdfe30014\t\t# ld $3,20($31)\n"); \ fprintf (STREAM, "\t.word\t0xdfe2001c\t\t# ld $2,28($31)\n"); \ @@ -2537,7 +2539,7 @@ typedef struct mips_args { fprintf (STREAM, "\t.word\t0x0060c821\t\t# move $25,$3 (abicalls)\n"); \ fprintf (STREAM, "\t.word\t0x00600008\t\t# jr $3\n"); \ fprintf (STREAM, "\t.word\t0x0020f821\t\t# move $31,$1\n"); \ - if (TARGET_LONG64) \ + if (Pmode == DImode) \ { \ fprintf (STREAM, "\t.dword\t0x00000000\t\t# \n"); \ fprintf (STREAM, "\t.dword\t0x00000000\t\t# \n"); \ @@ -2552,11 +2554,11 @@ typedef struct mips_args { /* A C expression for the size in bytes of the trampoline, as an integer. */ -#define TRAMPOLINE_SIZE (32 + (TARGET_LONG64 ? 16 : 8)) +#define TRAMPOLINE_SIZE (32 + (Pmode == DImode ? 16 : 8)) /* Alignment required for trampolines, in bits. */ -#define TRAMPOLINE_ALIGNMENT (TARGET_LONG64 ? 64 : 32) +#define TRAMPOLINE_ALIGNMENT (Pmode == DImode ? 64 : 32) /* INITIALIZE_TRAMPOLINE calls this library function to flush program and data caches. */ @@ -2574,7 +2576,7 @@ typedef struct mips_args { #define INITIALIZE_TRAMPOLINE(ADDR, FUNC, CHAIN) \ { \ rtx addr = ADDR; \ - if (TARGET_LONG64) \ + if (Pmode == DImode) \ { \ emit_move_insn (gen_rtx (MEM, DImode, plus_constant (addr, 32)), FUNC); \ emit_move_insn (gen_rtx (MEM, DImode, plus_constant (addr, 40)), CHAIN);\ @@ -3075,7 +3077,7 @@ while (0) overflow is no more likely than the overflow in a branch instruction. Large functions can currently break in both ways. */ #define CASE_VECTOR_MODE \ - (TARGET_MIPS16 ? HImode : TARGET_LONG64 ? DImode : SImode) + (TARGET_MIPS16 ? HImode : Pmode == DImode ? DImode : SImode) /* Define as C expression which evaluates to nonzero if the tablejump instruction expects the table to contain offsets from the address of the @@ -3136,13 +3138,15 @@ while (0) After generation of rtl, the compiler makes no further distinction between pointers and any other objects of this machine mode. */ +#ifndef Pmode #define Pmode (TARGET_LONG64 ? DImode : SImode) +#endif /* A function address in a call instruction is a word address (for indexing purposes) so give the MEM rtx a words's mode. */ -#define FUNCTION_MODE (TARGET_LONG64 ? DImode : SImode) +#define FUNCTION_MODE (Pmode == DImode ? DImode : SImode) /* Define TARGET_MEM_FUNCTIONS if we want to use calls to memcpy and memset, instead of the BSD functions bcopy and bzero. */ @@ -4147,7 +4151,7 @@ do { \ #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \ fprintf (STREAM, "\t%s\t%sL%d\n", \ - TARGET_LONG64 ? ".dword" : ".word", \ + Pmode == DImode ? ".dword" : ".word", \ LOCAL_LABEL_PREFIX, \ VALUE) @@ -4162,15 +4166,15 @@ do { \ LOCAL_LABEL_PREFIX, VALUE, LOCAL_LABEL_PREFIX, REL); \ else if (TARGET_EMBEDDED_PIC) \ fprintf (STREAM, "\t%s\t%sL%d-%sLS%d\n", \ - TARGET_LONG64 ? ".dword" : ".word", \ + Pmode == DImode ? ".dword" : ".word", \ LOCAL_LABEL_PREFIX, VALUE, LOCAL_LABEL_PREFIX, REL); \ else if (mips_abi == ABI_32) \ fprintf (STREAM, "\t%s\t%sL%d\n", \ - TARGET_LONG64 ? ".gpdword" : ".gpword", \ + Pmode == DImode ? ".gpdword" : ".gpword", \ LOCAL_LABEL_PREFIX, VALUE); \ else \ fprintf (STREAM, "\t%s\t%sL%d\n", \ - TARGET_LONG64 ? ".dword" : ".word", \ + Pmode == DImode ? ".dword" : ".word", \ LOCAL_LABEL_PREFIX, VALUE); \ } while (0) @@ -4410,12 +4414,12 @@ while (0) #ifndef SIZE_TYPE #define NO_BUILTIN_SIZE_TYPE -#define SIZE_TYPE (TARGET_LONG64 ? "long unsigned int" : "unsigned int") +#define SIZE_TYPE (Pmode == DImode ? "long unsigned int" : "unsigned int") #endif #ifndef PTRDIFF_TYPE #define NO_BUILTIN_PTRDIFF_TYPE -#define PTRDIFF_TYPE (TARGET_LONG64 ? "long int" : "int") +#define PTRDIFF_TYPE (Pmode == DImode ? "long int" : "int") #endif /* See mips_expand_prologue's use of loadgp for when this should be diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 25c7239a9b0..37b0519c305 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -8598,7 +8598,7 @@ move\\t%0,%z4\\n\\ if (GET_CODE (dest) != REG || GET_MODE (dest) != Pmode) operands[0] = copy_to_mode_reg (Pmode, dest); - if (!TARGET_LONG64) + if (!(Pmode == DImode)) emit_jump_insn (gen_indirect_jump_internal1 (operands[0])); else emit_jump_insn (gen_indirect_jump_internal2 (operands[0])); @@ -8609,7 +8609,7 @@ move\\t%0,%z4\\n\\ (define_insn "indirect_jump_internal1" [(set (pc) (match_operand:SI 0 "register_operand" "d"))] - "!TARGET_LONG64" + "!(Pmode == DImode)" "%*j\\t%0" [(set_attr "type" "jump") (set_attr "mode" "none") @@ -8617,7 +8617,7 @@ move\\t%0,%z4\\n\\ (define_insn "indirect_jump_internal2" [(set (pc) (match_operand:DI 0 "se_register_operand" "d"))] - "TARGET_LONG64" + "Pmode == DImode" "%*j\\t%0" [(set_attr "type" "jump") (set_attr "mode" "none") @@ -8638,7 +8638,7 @@ move\\t%0,%z4\\n\\ { if (GET_MODE (operands[0]) != HImode) abort (); - if (!TARGET_LONG64) + if (!(Pmode == DImode)) emit_jump_insn (gen_tablejump_mips161 (operands[0], operands[1])); else emit_jump_insn (gen_tablejump_mips162 (operands[0], operands[1])); @@ -8650,14 +8650,14 @@ move\\t%0,%z4\\n\\ if (! flag_pic) { - if (!TARGET_LONG64) + if (!(Pmode == DImode)) emit_jump_insn (gen_tablejump_internal1 (operands[0], operands[1])); else emit_jump_insn (gen_tablejump_internal2 (operands[0], operands[1])); } else { - if (!TARGET_LONG64) + if (!(Pmode == DImode)) emit_jump_insn (gen_tablejump_internal3 (operands[0], operands[1])); else emit_jump_insn (gen_tablejump_internal4 (operands[0], operands[1])); @@ -8671,7 +8671,7 @@ move\\t%0,%z4\\n\\ [(set (pc) (match_operand:SI 0 "register_operand" "d")) (use (label_ref (match_operand 1 "" "")))] - "!TARGET_LONG64" + "!(Pmode == DImode)" "%*j\\t%0" [(set_attr "type" "jump") (set_attr "mode" "none") @@ -8681,7 +8681,7 @@ move\\t%0,%z4\\n\\ [(set (pc) (match_operand:DI 0 "se_register_operand" "d")) (use (label_ref (match_operand 1 "" "")))] - "TARGET_LONG64" + "Pmode == DImode" "%*j\\t%0" [(set_attr "type" "jump") (set_attr "mode" "none") @@ -8698,7 +8698,7 @@ move\\t%0,%z4\\n\\ [(set (pc) (plus:SI (sign_extend:SI (match_operand:HI 0 "register_operand" "d")) (label_ref:SI (match_operand:SI 1 "" ""))))] - "TARGET_MIPS16 && !TARGET_LONG64" + "TARGET_MIPS16 && !(Pmode == DImode)" " { if (operands[0]) /* eliminate unused code warnings. */ @@ -8720,7 +8720,7 @@ move\\t%0,%z4\\n\\ [(set (pc) (plus:DI (sign_extend:DI (match_operand:HI 0 "register_operand" "d")) (label_ref:DI (match_operand:SI 1 "" ""))))] - "TARGET_MIPS16 && TARGET_LONG64" + "TARGET_MIPS16 && Pmode == DImode" " { if (operands[0]) /* eliminate unused code warnings. */ @@ -8748,7 +8748,7 @@ move\\t%0,%z4\\n\\ [(set (pc) (plus:SI (match_operand:SI 0 "register_operand" "d") (label_ref:SI (match_operand:SI 1 "" ""))))] - "!TARGET_LONG64 && next_active_insn (insn) != 0 + "!(Pmode == DImode) && next_active_insn (insn) != 0 && GET_CODE (PATTERN (next_active_insn (insn))) == ADDR_DIFF_VEC && PREV_INSN (next_active_insn (insn)) == operands[1]" "* @@ -8776,7 +8776,7 @@ move\\t%0,%z4\\n\\ [(set (pc) (plus:DI (match_operand:DI 0 "se_register_operand" "d") (label_ref:DI (match_operand:SI 1 "" ""))))] - "TARGET_LONG64 && next_active_insn (insn) != 0 + "Pmode == DImode && next_active_insn (insn) != 0 && GET_CODE (PATTERN (next_active_insn (insn))) == ADDR_DIFF_VEC && PREV_INSN (next_active_insn (insn)) == operands[1]" "%*j\\t%0" @@ -8810,7 +8810,7 @@ move\\t%0,%z4\\n\\ " { /* We need slightly different code for eight byte table entries. */ - if (TARGET_LONG64) + if (Pmode == DImode) abort (); if (operands[0]) @@ -8871,7 +8871,7 @@ move\\t%0,%z4\\n\\ "TARGET_ABICALLS" " { - if (TARGET_LONG64) + if (Pmode == DImode) emit_insn (gen_builtin_setjmp_setup_64 (operands[0])); else emit_insn (gen_builtin_setjmp_setup_32 (operands[0])); @@ -8882,14 +8882,14 @@ move\\t%0,%z4\\n\\ [(set (mem:SI (plus:SI (match_operand:SI 0 "register_operand" "r") (const_int 12))) (reg:SI 28))] - "TARGET_ABICALLS && ! TARGET_LONG64" + "TARGET_ABICALLS && ! (Pmode == DImode)" "") (define_expand "builtin_setjmp_setup_64" [(set (mem:DI (plus:DI (match_operand:DI 0 "register_operand" "r") (const_int 24))) (reg:DI 28))] - "TARGET_ABICALLS && TARGET_LONG64" + "TARGET_ABICALLS && Pmode == DImode" "") ;; For o32/n32/n64, we need to arrange for longjmp to put the @@ -8901,7 +8901,7 @@ move\\t%0,%z4\\n\\ " { /* The elements of the buffer are, in order: */ - int W = (TARGET_LONG64 ? 8 : 4); + int W = (Pmode == DImode ? 8 : 4); rtx fp = gen_rtx_MEM (Pmode, operands[0]); rtx lab = gen_rtx_MEM (Pmode, plus_constant (operands[0], 1*W)); rtx stack = gen_rtx_MEM (Pmode, plus_constant (operands[0], 2*W)); @@ -9138,7 +9138,7 @@ move\\t%0,%z4\\n\\ [(call (mem:SI (match_operand:SI 0 "register_operand" "r")) (match_operand 1 "" "i")) (clobber (match_operand:SI 2 "register_operand" "=d"))] - "!TARGET_LONG64 && !TARGET_ABICALLS && TARGET_LONG_CALLS" + "!(Pmode == DImode) && !TARGET_ABICALLS && TARGET_LONG_CALLS" "%*jal\\t%2,%0" [(set_attr "type" "call") (set_attr "mode" "none") @@ -9148,7 +9148,7 @@ move\\t%0,%z4\\n\\ [(call (mem:DI (match_operand:DI 0 "se_register_operand" "r")) (match_operand 1 "" "i")) (clobber (match_operand:SI 2 "register_operand" "=d"))] - "TARGET_LONG64 && !TARGET_ABICALLS && TARGET_LONG_CALLS" + "Pmode == DImode && !TARGET_ABICALLS && TARGET_LONG_CALLS" "%*jal\\t%2,%0" [(set_attr "type" "call") (set_attr "mode" "none") @@ -9158,7 +9158,7 @@ move\\t%0,%z4\\n\\ [(call (mem:SI (match_operand:SI 0 "register_operand" "r")) (match_operand 1 "" "i")) (clobber (match_operand:SI 2 "register_operand" "=d"))] - "!TARGET_LONG64 && TARGET_ABICALLS && TARGET_LONG_CALLS" + "!(Pmode == DImode) && TARGET_ABICALLS && TARGET_LONG_CALLS" "* { if (REGNO (operands[0]) != PIC_FUNCTION_ADDR_REGNUM) @@ -9174,7 +9174,7 @@ move\\t%0,%z4\\n\\ [(call (mem:DI (match_operand:DI 0 "se_register_operand" "r")) (match_operand 1 "" "i")) (clobber (match_operand:SI 2 "register_operand" "=d"))] - "TARGET_LONG64 && TARGET_ABICALLS && TARGET_LONG_CALLS" + "Pmode == DImode && TARGET_ABICALLS && TARGET_LONG_CALLS" "* { if (REGNO (operands[0]) != PIC_FUNCTION_ADDR_REGNUM) @@ -9336,7 +9336,7 @@ move\\t%0,%z4\\n\\ (call (mem:SI (match_operand:SI 1 "register_operand" "r")) (match_operand 2 "" "i"))) (clobber (match_operand:SI 3 "register_operand" "=d"))] - "!TARGET_LONG64 && !TARGET_ABICALLS && TARGET_LONG_CALLS" + "!(Pmode == DImode) && !TARGET_ABICALLS && TARGET_LONG_CALLS" "%*jal\\t%3,%1" [(set_attr "type" "call") (set_attr "mode" "none") @@ -9347,7 +9347,7 @@ move\\t%0,%z4\\n\\ (call (mem:DI (match_operand:DI 1 "se_register_operand" "r")) (match_operand 2 "" "i"))) (clobber (match_operand:SI 3 "register_operand" "=d"))] - "TARGET_LONG64 && !TARGET_ABICALLS && TARGET_LONG_CALLS" + "Pmode == DImode && !TARGET_ABICALLS && TARGET_LONG_CALLS" "%*jal\\t%3,%1" [(set_attr "type" "call") (set_attr "mode" "none") @@ -9358,7 +9358,7 @@ move\\t%0,%z4\\n\\ (call (mem:SI (match_operand:SI 1 "register_operand" "r")) (match_operand 2 "" "i"))) (clobber (match_operand:SI 3 "register_operand" "=d"))] - "!TARGET_LONG64 && TARGET_ABICALLS && TARGET_LONG_CALLS" + "!(Pmode == DImode) && TARGET_ABICALLS && TARGET_LONG_CALLS" "* { if (REGNO (operands[1]) != PIC_FUNCTION_ADDR_REGNUM) @@ -9375,7 +9375,7 @@ move\\t%0,%z4\\n\\ (call (mem:DI (match_operand:DI 1 "se_register_operand" "r")) (match_operand 2 "" "i"))) (clobber (match_operand:SI 3 "register_operand" "=d"))] - "TARGET_LONG64 && TARGET_ABICALLS && TARGET_LONG_CALLS" + "Pmode == DImode && TARGET_ABICALLS && TARGET_LONG_CALLS" "* { if (REGNO (operands[1]) != PIC_FUNCTION_ADDR_REGNUM) -- 2.30.2