From 1effbf68983c924b3b70fd2fd9206af6b5475335 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Kristian=20H=C3=B8gsberg?= Date: Mon, 7 Jul 2014 14:49:12 -0700 Subject: [PATCH] i965: Add an option to not generate the SIMD8 fragment shader MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit For now, this can only be triggered with a new 'no8' INTEL_DEBUG option and a new context flag. We'll use the context flag later, but introducing it now lets us bisect to this commit if it breaks something. Signed-off-by: Kristian Høgsberg Acked-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_context.h | 2 ++ src/mesa/drivers/dri/i965/brw_fs.cpp | 12 +++++++++++- src/mesa/drivers/dri/i965/gen7_wm_state.c | 4 ++-- src/mesa/drivers/dri/i965/gen8_ps_state.c | 4 ++-- src/mesa/drivers/dri/i965/intel_debug.c | 1 + src/mesa/drivers/dri/i965/intel_debug.h | 1 + 6 files changed, 19 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 2367a95e6af..f84ced9f9d0 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -341,6 +341,7 @@ struct brw_wm_prog_data { /** @} */ } binding_table; + bool no_8; bool dual_src_blend; bool uses_pos_offset; bool uses_omask; @@ -1032,6 +1033,7 @@ struct brw_context bool has_compr4; bool has_negative_rhw_bug; bool has_pln; + bool no_simd8; /** * Some versions of Gen hardware don't do centroid interpolation correctly diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index ed7a0bce8ca..565189ba3aa 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -3299,10 +3299,20 @@ brw_wm_fs_emit(struct brw_context *brw, } } + exec_list *simd8_instructions; + int no_simd8 = (INTEL_DEBUG & DEBUG_NO8) || brw->no_simd8; + if (no_simd8 && simd16_instructions) { + simd8_instructions = NULL; + prog_data->no_8 = true; + } else { + simd8_instructions = &v.instructions; + prog_data->no_8 = false; + } + const unsigned *assembly = NULL; fs_generator g(brw, mem_ctx, key, prog_data, prog, fp, v.runtime_check_aads_emit, INTEL_DEBUG & DEBUG_WM); - assembly = g.generate_assembly(&v.instructions, simd16_instructions, + assembly = g.generate_assembly(simd8_instructions, simd16_instructions, final_assembly_size); if (unlikely(brw->perf_debug) && shader) { diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c b/src/mesa/drivers/dri/i965/gen7_wm_state.c index c03d19db163..c3e93164c18 100644 --- a/src/mesa/drivers/dri/i965/gen7_wm_state.c +++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c @@ -223,9 +223,9 @@ upload_ps_state(struct brw_context *brw) _mesa_get_min_invocations_per_fragment(ctx, brw->fragment_program, false); assert(min_inv_per_frag >= 1); - if (brw->wm.prog_data->prog_offset_16) { + if (brw->wm.prog_data->prog_offset_16 || brw->wm.prog_data->no_8) { dw4 |= GEN7_PS_16_DISPATCH_ENABLE; - if (min_inv_per_frag == 1) { + if (!brw->wm.prog_data->no_8 && min_inv_per_frag == 1) { dw4 |= GEN7_PS_8_DISPATCH_ENABLE; dw5 |= (brw->wm.prog_data->base.dispatch_grf_start_reg << GEN7_PS_DISPATCH_START_GRF_SHIFT_0); diff --git a/src/mesa/drivers/dri/i965/gen8_ps_state.c b/src/mesa/drivers/dri/i965/gen8_ps_state.c index f58d49c55cb..49d4fe0e4f8 100644 --- a/src/mesa/drivers/dri/i965/gen8_ps_state.c +++ b/src/mesa/drivers/dri/i965/gen8_ps_state.c @@ -195,9 +195,9 @@ upload_ps_state(struct brw_context *brw) _mesa_get_min_invocations_per_fragment(ctx, brw->fragment_program, false); assert(min_invocations_per_fragment >= 1); - if (brw->wm.prog_data->prog_offset_16) { + if (brw->wm.prog_data->prog_offset_16 || brw->wm.prog_data->no_8) { dw6 |= GEN7_PS_16_DISPATCH_ENABLE; - if (min_invocations_per_fragment == 1) { + if (!brw->wm.prog_data->no_8 && min_invocations_per_fragment == 1) { dw6 |= GEN7_PS_8_DISPATCH_ENABLE; dw7 |= (brw->wm.prog_data->base.dispatch_grf_start_reg << GEN7_PS_DISPATCH_START_GRF_SHIFT_0); diff --git a/src/mesa/drivers/dri/i965/intel_debug.c b/src/mesa/drivers/dri/i965/intel_debug.c index c72fce2581a..1fb8b6cd1e2 100644 --- a/src/mesa/drivers/dri/i965/intel_debug.c +++ b/src/mesa/drivers/dri/i965/intel_debug.c @@ -66,6 +66,7 @@ static const struct dri_debug_control debug_control[] = { { "nodualobj", DEBUG_NO_DUAL_OBJECT_GS }, { "optimizer", DEBUG_OPTIMIZER }, { "noann", DEBUG_NO_ANNOTATION }, + { "no8", DEBUG_NO8 }, { NULL, 0 } }; diff --git a/src/mesa/drivers/dri/i965/intel_debug.h b/src/mesa/drivers/dri/i965/intel_debug.h index 37dc34a2611..8e1c2991f07 100644 --- a/src/mesa/drivers/dri/i965/intel_debug.h +++ b/src/mesa/drivers/dri/i965/intel_debug.h @@ -62,6 +62,7 @@ extern uint64_t INTEL_DEBUG; #define DEBUG_NO_DUAL_OBJECT_GS 0x80000000 #define DEBUG_OPTIMIZER 0x100000000 #define DEBUG_NO_ANNOTATION 0x200000000 +#define DEBUG_NO8 0x40000000 #ifdef HAVE_ANDROID_PLATFORM #define LOG_TAG "INTEL-MESA" -- 2.30.2