From 1f35669508ea1f5fce78e213e44db0ea3e2db805 Mon Sep 17 00:00:00 2001 From: Tim 'mithro' Ansell Date: Sat, 11 Apr 2020 18:34:29 -0700 Subject: [PATCH] litex_sim: Find tapcfg from pythondata module. --- litex/build/sim/core/modules/ethernet/Makefile | 6 +++--- litex/build/sim/core/modules/xgmii_ethernet/Makefile | 6 +++--- litex/build/sim/core/modules/xgmii_ethernet/tapcfg | 1 - litex/build/sim/verilator.py | 6 ++++-- 4 files changed, 10 insertions(+), 9 deletions(-) delete mode 120000 litex/build/sim/core/modules/xgmii_ethernet/tapcfg diff --git a/litex/build/sim/core/modules/ethernet/Makefile b/litex/build/sim/core/modules/ethernet/Makefile index 461ed86b..392ede18 100644 --- a/litex/build/sim/core/modules/ethernet/Makefile +++ b/litex/build/sim/core/modules/ethernet/Makefile @@ -3,7 +3,7 @@ UNAME_S := $(shell uname -s) include $(SRC_DIR)/modules/rules.mak -CFLAGS += -I$(MOD_SRC_DIR)/tapcfg/src/include +CFLAGS += -I$(TAPCFG_DIRECTORY)/src/include OBJS = $(MOD).o tapcfg.o taplog.o $(MOD).so: $(OBJS) @@ -13,8 +13,8 @@ else $(CC) $(LDFLAGS) -Wl,-soname,$@ -o $@ $^ endif -tapcfg.o: $(MOD_SRC_DIR)/tapcfg/src/lib/tapcfg.c +tapcfg.o: $(TAPCFG_DIRECTORY)/src/lib/tapcfg.c $(CC) $(CFLAGS) -c -o $@ $< -taplog.o: $(MOD_SRC_DIR)/tapcfg/src/lib/taplog.c +taplog.o: $(TAPCFG_DIRECTORY)/src/lib/taplog.c $(CC) $(CFLAGS) -c -o $@ $< diff --git a/litex/build/sim/core/modules/xgmii_ethernet/Makefile b/litex/build/sim/core/modules/xgmii_ethernet/Makefile index 461ed86b..392ede18 100644 --- a/litex/build/sim/core/modules/xgmii_ethernet/Makefile +++ b/litex/build/sim/core/modules/xgmii_ethernet/Makefile @@ -3,7 +3,7 @@ UNAME_S := $(shell uname -s) include $(SRC_DIR)/modules/rules.mak -CFLAGS += -I$(MOD_SRC_DIR)/tapcfg/src/include +CFLAGS += -I$(TAPCFG_DIRECTORY)/src/include OBJS = $(MOD).o tapcfg.o taplog.o $(MOD).so: $(OBJS) @@ -13,8 +13,8 @@ else $(CC) $(LDFLAGS) -Wl,-soname,$@ -o $@ $^ endif -tapcfg.o: $(MOD_SRC_DIR)/tapcfg/src/lib/tapcfg.c +tapcfg.o: $(TAPCFG_DIRECTORY)/src/lib/tapcfg.c $(CC) $(CFLAGS) -c -o $@ $< -taplog.o: $(MOD_SRC_DIR)/tapcfg/src/lib/taplog.c +taplog.o: $(TAPCFG_DIRECTORY)/src/lib/taplog.c $(CC) $(CFLAGS) -c -o $@ $< diff --git a/litex/build/sim/core/modules/xgmii_ethernet/tapcfg b/litex/build/sim/core/modules/xgmii_ethernet/tapcfg deleted file mode 120000 index d0b6901b..00000000 --- a/litex/build/sim/core/modules/xgmii_ethernet/tapcfg +++ /dev/null @@ -1 +0,0 @@ -../ethernet/tapcfg/ \ No newline at end of file diff --git a/litex/build/sim/verilator.py b/litex/build/sim/verilator.py index f068d08d..2fc25194 100644 --- a/litex/build/sim/verilator.py +++ b/litex/build/sim/verilator.py @@ -7,7 +7,7 @@ import sys import subprocess from migen.fhdl.structure import _Fragment - +from litex import get_data_mod from litex.build import tools from litex.build.generic_platform import * @@ -102,13 +102,15 @@ extern "C" void litex_sim_init(void **out) def _generate_sim_variables(include_paths): + tapcfg_dir = get_data_mod("misc", "tapcfg").data_location include = "" for path in include_paths: include += "-I"+path+" " content = """\ SRC_DIR = {} INC_DIR = {} -""".format(core_directory, include) +TAPCFG_DIRECTORY = {} +""".format(core_directory, include, tapcfg_dir) tools.write_to_file("variables.mak", content) -- 2.30.2