From 1f5aa628e342ab42577273206a67585d04fef5cc Mon Sep 17 00:00:00 2001 From: Segher Boessenkool Date: Wed, 5 Jun 2019 01:36:01 +0200 Subject: [PATCH] rs6000: More simplification A whole bunch of mode attributes are used only once. Things are easier to read if we just expand those patterns. It's shorter, too. * config/rs6000/vsx.md (define_mode_attr VSr4): Delete. (define_mode_attr VSr5): Delete. (define_mode_attr VStype_sqrt): Delete. (define_mode_iterator VSX_SPDP): Delete. (define_mode_attr VS_spdp_res): Delete. (define_mode_attr VS_spdp_insn): Delete. (define_mode_attr VS_spdp_type): Delete. (*vsx_sqrt2): Adjust. (vsx_): Delete, split to... (vsx_xscvdpsp): ... this. New. And... (vsx_xvcvspdp): ... this. New. And... (vsx_xvcvdpsp): ... this. New. From-SVN: r271937 --- gcc/ChangeLog | 15 ++++++++++ gcc/config/rs6000/vsx.md | 65 ++++++++++++++-------------------------- 2 files changed, 38 insertions(+), 42 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3571664b160..857b30710ff 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,18 @@ +2019-06-04 Segher Boessenkool + + * config/rs6000/vsx.md (define_mode_attr VSr4): Delete. + (define_mode_attr VSr5): Delete. + (define_mode_attr VStype_sqrt): Delete. + (define_mode_iterator VSX_SPDP): Delete. + (define_mode_attr VS_spdp_res): Delete. + (define_mode_attr VS_spdp_insn): Delete. + (define_mode_attr VS_spdp_type): Delete. + (*vsx_sqrt2): Adjust. + (vsx_): Delete, split to... + (vsx_xscvdpsp): ... this. New. And... + (vsx_xvcvspdp): ... this. New. And... + (vsx_xvcvdpsp): ... this. New. + 2019-06-04 Segher Boessenkool * config/rs6000/rs6000.md (define_mode_attr sd): Add values for V4SF diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 4061a5e2292..b3ebc95511f 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -118,18 +118,6 @@ (KF "wq") (TF "wp")]) -;; Map the register class for sp<->dp float conversions, destination -(define_mode_attr VSr4 [(SF "wa") - (DF "f") - (V2DF "wa") - (V4SF "v")]) - -;; Map the register class for sp<->dp float conversions, source -(define_mode_attr VSr5 [(SF "wa") - (DF "f") - (V2DF "v") - (V4SF "wa")]) - ;; The VSX register class that a type can occupy, even if it is not the ;; preferred register class (VSr is the preferred register class that will get ;; allocated first). @@ -213,29 +201,6 @@ (V4SF "vecfdiv") (DF "ddiv")]) -;; Appropriate type for sqrt ops. For now, just lump the vector sqrt with -;; the scalar sqrt -(define_mode_attr VStype_sqrt [(V2DF "dsqrt") - (V4SF "ssqrt") - (DF "dsqrt")]) - -;; Iterator and modes for sp<->dp conversions -;; Because scalar SF values are represented internally as double, use the -;; V4SF type to represent this than SF. -(define_mode_iterator VSX_SPDP [DF V4SF V2DF]) - -(define_mode_attr VS_spdp_res [(DF "V4SF") - (V4SF "V2DF") - (V2DF "V4SF")]) - -(define_mode_attr VS_spdp_insn [(DF "xscvdpsp") - (V4SF "xvcvspdp") - (V2DF "xvcvdpsp")]) - -(define_mode_attr VS_spdp_type [(DF "fp") - (V4SF "vecdouble") - (V2DF "vecdouble")]) - ;; Map the scalar mode for a vector type (define_mode_attr VS_scalar [(V1TI "TI") (V2DF "DF") @@ -1831,7 +1796,7 @@ (sqrt:VSX_F (match_operand:VSX_F 1 "vsx_register_operand" "wa")))] "VECTOR_UNIT_VSX_P (mode)" "xvsqrtp %x0,%x1" - [(set_attr "type" "")]) + [(set_attr "type" "sqrt")]) (define_insn "*vsx_rsqrte2" [(set (match_operand:VSX_F 0 "vsx_register_operand" "=wa") @@ -2149,13 +2114,29 @@ ;; Don't use xscvspdp and xscvdpsp for scalar conversions, since the normal ;; scalar single precision instructions internally use the double format. ;; Prefer the altivec registers, since we likely will need to do a vperm -(define_insn "vsx_" - [(set (match_operand: 0 "vsx_register_operand" "=,?wa") - (unspec: [(match_operand:VSX_SPDP 1 "vsx_register_operand" ",wa")] +(define_insn "vsx_xscvdpsp" + [(set (match_operand:V4SF 0 "vsx_register_operand" "=f,?wa") + (unspec:V4SF [(match_operand:DF 1 "vsx_register_operand" "f,wa")] UNSPEC_VSX_CVSPDP))] - "VECTOR_UNIT_VSX_P (mode)" - " %x0,%x1" - [(set_attr "type" "")]) + "VECTOR_UNIT_VSX_P (DFmode)" + "xscvdpsp %x0,%x1" + [(set_attr "type" "fp")]) + +(define_insn "vsx_xvcvspdp" + [(set (match_operand:V2DF 0 "vsx_register_operand" "=v,?wa") + (unspec:V2DF [(match_operand:V4SF 1 "vsx_register_operand" "wa,wa")] + UNSPEC_VSX_CVSPDP))] + "VECTOR_UNIT_VSX_P (V4SFmode)" + "xvcvspdp %x0,%x1" + [(set_attr "type" "vecdouble")]) + +(define_insn "vsx_xvcvdpsp" + [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa,?wa") + (unspec:V4SF [(match_operand:V2DF 1 "vsx_register_operand" "v,wa")] + UNSPEC_VSX_CVSPDP))] + "VECTOR_UNIT_VSX_P (V2DFmode)" + "xvcvdpsp %x0,%x1" + [(set_attr "type" "vecdouble")]) ;; xscvspdp, represent the scalar SF type as V4SF (define_insn "vsx_xscvspdp" -- 2.30.2