From 1f6280a317ca2059ac5a1b99bac94928576fafd0 Mon Sep 17 00:00:00 2001 From: Paul Mackerras Date: Tue, 2 Jun 2020 09:13:11 +1000 Subject: [PATCH] Re: [libre-riscv-dev] [OpenPOWER-HDL-Cores] microwatt decoder tables: M-Form and X-Form switched RS and RB --- c0/53c9a6107adef7b4ecec839f9b8d5e9f5ab059 | 87 +++++++++++++++++++++++ 1 file changed, 87 insertions(+) create mode 100644 c0/53c9a6107adef7b4ecec839f9b8d5e9f5ab059 diff --git a/c0/53c9a6107adef7b4ecec839f9b8d5e9f5ab059 b/c0/53c9a6107adef7b4ecec839f9b8d5e9f5ab059 new file mode 100644 index 0000000..5c05504 --- /dev/null +++ b/c0/53c9a6107adef7b4ecec839f9b8d5e9f5ab059 @@ -0,0 +1,87 @@ +Return-path: +Envelope-to: publicinbox@libre-riscv.org +Delivery-date: Tue, 02 Jun 2020 00:13:21 +0100 +Received: from localhost ([::1] helo=libre-riscv.org) + by libre-soc.org with esmtp (Exim 4.89) + (envelope-from ) + id 1jftcO-00029w-1R; Tue, 02 Jun 2020 00:13:20 +0100 +Received: from ozlabs.org ([203.11.71.1]) + by libre-soc.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) + (Exim 4.89) (envelope-from ) id 1jftcM-00029p-Fg + for libre-riscv-dev@lists.libre-riscv.org; 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