From 1fd03b5ab2e0b0d7deefff200384e02f5debe5fb Mon Sep 17 00:00:00 2001 From: Stephane Carrez Date: Wed, 14 Aug 2002 08:14:30 +0000 Subject: [PATCH] * elf32-m68hc11.c (m68hc11_relax_group): New to relax group of instructions. (m68hc11_direct_relax): New to define table of relaxable instructions. (find_relaxable_insn): New, find a relaxable insn. (compare_reloc): New to compare two relocs. (m68hc11_elf_relax_section): New, relax text sections. (m68hc11_elf_relax_delete_bytes): New, delete bytes and adjust branchs. (elf32_m68hc11_check_relocs): New function for GC support. (elf32_m68hc11_relocate_section): New function for GC support. (bfd_elf32_bfd_relax_section): Define to support linker relaxation. (elf_backend_check_relocs): Likewise. (elf_backend_relocate_section): Likewise. --- bfd/ChangeLog | 15 + bfd/elf32-m68hc11.c | 1052 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 1067 insertions(+) diff --git a/bfd/ChangeLog b/bfd/ChangeLog index c9f0efe30e1..45474947e8a 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,18 @@ +2002-08-14 Stephane Carrez + + * elf32-m68hc11.c (m68hc11_relax_group): New to relax group of + instructions. + (m68hc11_direct_relax): New to define table of relaxable instructions. + (find_relaxable_insn): New, find a relaxable insn. + (compare_reloc): New to compare two relocs. + (m68hc11_elf_relax_section): New, relax text sections. + (m68hc11_elf_relax_delete_bytes): New, delete bytes and adjust branchs. + (elf32_m68hc11_check_relocs): New function for GC support. + (elf32_m68hc11_relocate_section): New function for GC support. + (bfd_elf32_bfd_relax_section): Define to support linker relaxation. + (elf_backend_check_relocs): Likewise. + (elf_backend_relocate_section): Likewise. + 2002-08-13 H.J. Lu * elflink.h (NAME(bfd_elf,size_dynamic_sections): Don't count diff --git a/bfd/elf32-m68hc11.c b/bfd/elf32-m68hc11.c index 7741115dd86..2663f5f6f4e 100644 --- a/bfd/elf32-m68hc11.c +++ b/bfd/elf32-m68hc11.c @@ -21,6 +21,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "bfd.h" #include "sysdep.h" +#include "bfdlink.h" #include "libbfd.h" #include "elf-bfd.h" #include "elf/m68hc11.h" @@ -43,6 +44,23 @@ PARAMS ((bfd *abfd, struct bfd_link_info *info, static boolean elf32_m68hc11_gc_sweep_hook PARAMS ((bfd *abfd, struct bfd_link_info *info, asection *sec, const Elf_Internal_Rela *relocs)); +static boolean elf32_m68hc11_check_relocs +PARAMS ((bfd * abfd, struct bfd_link_info * info, + asection * sec, const Elf_Internal_Rela * relocs)); +static boolean elf32_m68hc11_relocate_section +PARAMS ((bfd *output_bfd, struct bfd_link_info *info, + bfd *input_bfd, asection *input_section, + bfd_byte *contents, Elf_Internal_Rela *relocs, + Elf_Internal_Sym *local_syms, asection **local_sections)); +static boolean m68hc11_elf_relax_section + PARAMS ((bfd *, asection *, struct bfd_link_info *, boolean *)); +static void m68hc11_elf_relax_delete_bytes +PARAMS ((bfd *abfd, asection *sec, bfd_vma addr, int count)); +static void m68hc11_relax_group +PARAMS ((bfd *abfd, asection *sec, bfd_byte *contents, + unsigned value, unsigned long offset, unsigned long end_group)); +static int compare_reloc PARAMS ((const void*, const void*)); + boolean _bfd_m68hc11_elf_merge_private_bfd_data PARAMS ((bfd*, bfd*)); boolean _bfd_m68hc11_elf_set_private_flags PARAMS ((bfd*, flagword)); @@ -439,6 +457,1037 @@ elf32_m68hc11_gc_sweep_hook (abfd, info, sec, relocs) return true; } +struct m68hc11_direct_relax +{ + const char *name; + unsigned char code; + unsigned char direct_code; +} m68hc11_direct_relax_table[] = { + { "adca", 0xB9, 0x99 }, + { "adcb", 0xF9, 0xD9 }, + { "adda", 0xBB, 0x9B }, + { "addb", 0xFB, 0xDB }, + { "addd", 0xF3, 0xD3 }, + { "anda", 0xB4, 0x94 }, + { "andb", 0xF4, 0xD4 }, + { "cmpa", 0xB1, 0x91 }, + { "cmpb", 0xF1, 0xD1 }, + { "cpd", 0xB3, 0x93 }, + { "cpxy", 0xBC, 0x9C }, +/* { "cpy", 0xBC, 0x9C }, */ + { "eora", 0xB8, 0x98 }, + { "eorb", 0xF8, 0xD8 }, + { "jsr", 0xBD, 0x9D }, + { "ldaa", 0xB6, 0x96 }, + { "ldab", 0xF6, 0xD6 }, + { "ldd", 0xFC, 0xDC }, + { "lds", 0xBE, 0x9E }, + { "ldxy", 0xFE, 0xDE }, + /* { "ldy", 0xFE, 0xDE },*/ + { "oraa", 0xBA, 0x9A }, + { "orab", 0xFA, 0xDA }, + { "sbca", 0xB2, 0x92 }, + { "sbcb", 0xF2, 0xD2 }, + { "staa", 0xB7, 0x97 }, + { "stab", 0xF7, 0xD7 }, + { "std", 0xFD, 0xDD }, + { "sts", 0xBF, 0x9F }, + { "stxy", 0xFF, 0xDF }, + /* { "sty", 0xFF, 0xDF },*/ + { "suba", 0xB0, 0x90 }, + { "subb", 0xF0, 0xD0 }, + { "subd", 0xB3, 0x93 }, + { 0, 0, 0 } +}; + +static struct m68hc11_direct_relax * +find_relaxable_insn (unsigned char code) +{ + int i; + + for (i = 0; m68hc11_direct_relax_table[i].name; i++) + if (m68hc11_direct_relax_table[i].code == code) + return &m68hc11_direct_relax_table[i]; + + return 0; +} + +static int +compare_reloc (e1, e2) + const void *e1; + const void *e2; +{ + const Elf_Internal_Rela *i1 = (const Elf_Internal_Rela *) e1; + const Elf_Internal_Rela *i2 = (const Elf_Internal_Rela *) e2; + + if (i1->r_offset == i2->r_offset) + return 0; + else + return i1->r_offset < i2->r_offset ? -1 : 1; +} + +#define M6811_OP_LDX_IMMEDIATE (0xCE) + +static void +m68hc11_relax_group (abfd, sec, contents, value, offset, end_group) + bfd *abfd; + asection *sec; + bfd_byte *contents; + unsigned value; + unsigned long offset; + unsigned long end_group; +{ + unsigned char code; + unsigned long start_offset; + unsigned long ldx_offset = offset; + unsigned long ldx_size; + int can_delete_ldx; + int relax_ldy = 0; + + /* First instruction of the relax group must be a + LDX #value or LDY #value. If this is not the case, + ignore the relax group. */ + code = bfd_get_8 (abfd, contents + offset); + if (code == 0x18) + { + relax_ldy++; + offset++; + code = bfd_get_8 (abfd, contents + offset); + } + ldx_size = offset - ldx_offset + 3; + offset += 3; + if (code != M6811_OP_LDX_IMMEDIATE || offset >= end_group) + return; + + + /* We can remove the LDX/LDY only when all bset/brclr instructions + of the relax group have been converted to use direct addressing + mode. */ + can_delete_ldx = 1; + while (offset < end_group) + { + unsigned isize; + unsigned new_value; + int bset_use_y; + + bset_use_y = 0; + start_offset = offset; + code = bfd_get_8 (abfd, contents + offset); + if (code == 0x18) + { + bset_use_y++; + offset++; + code = bfd_get_8 (abfd, contents + offset); + } + + /* Check the instruction and translate to use direct addressing mode. */ + switch (code) + { + /* bset */ + case 0x1C: + code = 0x14; + isize = 3; + break; + + /* brclr */ + case 0x1F: + code = 0x13; + isize = 4; + break; + + /* brset */ + case 0x1E: + code = 0x12; + isize = 4; + break; + + /* bclr */ + case 0x1D: + code = 0x15; + isize = 3; + break; + + /* This instruction is not recognized and we are not + at end of the relax group. Ignore and don't remove + the first LDX (we don't know what it is used for...). */ + default: + return; + } + new_value = (unsigned) bfd_get_8 (abfd, contents + offset + 1); + new_value += value; + if ((new_value & 0xff00) == 0 && bset_use_y == relax_ldy) + { + bfd_put_8 (abfd, code, contents + offset); + bfd_put_8 (abfd, new_value, contents + offset + 1); + if (start_offset != offset) + { + m68hc11_elf_relax_delete_bytes (abfd, sec, start_offset, + offset - start_offset); + end_group--; + } + } + else + { + can_delete_ldx = 0; + } + offset = start_offset + isize; + } + if (can_delete_ldx) + { + /* Remove the move instruction (3 or 4 bytes win). */ + m68hc11_elf_relax_delete_bytes (abfd, sec, ldx_offset, ldx_size); + } +} + +/* This function handles relaxing for the 68HC11. + + + and somewhat more difficult to support. */ + +static boolean +m68hc11_elf_relax_section (abfd, sec, link_info, again) + bfd *abfd; + asection *sec; + struct bfd_link_info *link_info; + boolean *again; +{ + Elf_Internal_Shdr *symtab_hdr; + Elf_Internal_Shdr *shndx_hdr; + Elf_Internal_Rela *internal_relocs; + Elf_Internal_Rela *free_relocs = NULL; + Elf_Internal_Rela *irel, *irelend; + bfd_byte *contents = NULL; + bfd_byte *free_contents = NULL; + Elf32_External_Sym *extsyms = NULL; + Elf32_External_Sym *free_extsyms = NULL; + Elf_Internal_Rela *prev_insn_branch = NULL; + Elf_Internal_Rela *prev_insn_group = NULL; + unsigned insn_group_value = 0; + Elf_External_Sym_Shndx *shndx_buf = NULL; + + /* Assume nothing changes. */ + *again = false; + + /* We don't have to do anything for a relocateable link, if + this section does not have relocs, or if this is not a + code section. */ + if (link_info->relocateable + || (sec->flags & SEC_RELOC) == 0 + || sec->reloc_count == 0 + || (sec->flags & SEC_CODE) == 0) + return true; + + /* If this is the first time we have been called for this section, + initialize the cooked size. */ + if (sec->_cooked_size == 0) + sec->_cooked_size = sec->_raw_size; + + symtab_hdr = &elf_tdata (abfd)->symtab_hdr; + shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr; + + /* Get a copy of the native relocations. */ + internal_relocs = (_bfd_elf32_link_read_relocs + (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL, + link_info->keep_memory)); + if (internal_relocs == NULL) + goto error_return; + if (! link_info->keep_memory) + free_relocs = internal_relocs; + + /* Checking for branch relaxation relies on the relocations to + be sorted on 'r_offset'. This is not guaranteed so we must sort. */ + qsort (internal_relocs, sec->reloc_count, sizeof (Elf_Internal_Rela), + compare_reloc); + + /* Walk through them looking for relaxing opportunities. */ + irelend = internal_relocs + sec->reloc_count; + for (irel = internal_relocs; irel < irelend; irel++) + { + bfd_vma symval; + bfd_vma value; + Elf_Internal_Sym isym; + + /* If this isn't something that can be relaxed, then ignore + this reloc. */ + if (ELF32_R_TYPE (irel->r_info) != (int) R_M68HC11_16 + && ELF32_R_TYPE (irel->r_info) != (int) R_M68HC11_RL_JUMP + && ELF32_R_TYPE (irel->r_info) != (int) R_M68HC11_RL_GROUP) + { + prev_insn_branch = 0; + prev_insn_group = 0; + continue; + } + + /* Get the section contents if we haven't done so already. */ + if (contents == NULL) + { + /* Get cached copy if it exists. */ + if (elf_section_data (sec)->this_hdr.contents != NULL) + contents = elf_section_data (sec)->this_hdr.contents; + else + { + /* Go get them off disk. */ + contents = (bfd_byte *) bfd_malloc (sec->_raw_size); + if (contents == NULL) + goto error_return; + free_contents = contents; + + if (! bfd_get_section_contents (abfd, sec, contents, + (file_ptr) 0, sec->_raw_size)) + goto error_return; + } + } + + /* Try to eliminate an unconditional 8 bit pc-relative branch + which immediately follows a conditional 8 bit pc-relative + branch around the unconditional branch. + + original: new: + bCC lab1 bCC' lab2 + bra lab2 + lab1: lab1: + + This happens when the bCC can't reach lab2 at assembly time, + but due to other relaxations it can reach at link time. */ + if (ELF32_R_TYPE (irel->r_info) == (int) R_M68HC11_RL_JUMP) + { + Elf_Internal_Rela *nrel; + unsigned char code; + unsigned char roffset; + + prev_insn_branch = 0; + prev_insn_group = 0; + + /* Do nothing if this reloc is the last byte in the section. */ + if (irel->r_offset == sec->_cooked_size) + continue; + + /* See if the next instruction is an unconditional pc-relative + branch, more often than not this test will fail, so we + test it first to speed things up. */ + code = bfd_get_8 (abfd, contents + irel->r_offset + 2); + if (code != 0x7e) + continue; + + /* Also make sure the next relocation applies to the next + instruction and that it's a pc-relative 8 bit branch. */ + nrel = irel + 1; + if (nrel == irelend + || irel->r_offset + 3 != nrel->r_offset + || ELF32_R_TYPE (nrel->r_info) != (int) R_M68HC11_16) + continue; + + /* Make sure our destination immediately follows the + unconditional branch. */ + roffset = bfd_get_8 (abfd, contents + irel->r_offset + 1); + if (roffset != 3) + continue; + + prev_insn_branch = irel; + prev_insn_group = 0; + continue; + } + + /* Read this BFD's symbols if we haven't done so already. */ + if (extsyms == NULL) + { + /* Get cached copy if it exists. */ + if (symtab_hdr->contents != NULL) + extsyms = (Elf32_External_Sym *) symtab_hdr->contents; + else + { + /* Go get them off disk. */ + bfd_size_type amt = symtab_hdr->sh_size; + extsyms = (Elf32_External_Sym *) bfd_malloc (amt); + if (extsyms == NULL) + goto error_return; + free_extsyms = extsyms; + if (bfd_seek (abfd, symtab_hdr->sh_offset, SEEK_SET) != 0 + || bfd_bread ((PTR) extsyms, amt, abfd) != amt) + goto error_return; + } + + if (shndx_hdr->sh_size != 0) + { + bfd_size_type amt; + + amt = symtab_hdr->sh_info * sizeof (Elf_External_Sym_Shndx); + shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt); + if (shndx_buf == NULL) + goto error_return; + if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0 + || bfd_bread ((PTR) shndx_buf, amt, abfd) != amt) + goto error_return; + shndx_hdr->contents = (PTR) shndx_buf; + } + } + + /* Get the value of the symbol referred to by the reloc. */ + if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) + { + Elf32_External_Sym *esym; + Elf_External_Sym_Shndx *shndx; + asection *sym_sec; + + /* A local symbol. */ + esym = extsyms + ELF32_R_SYM (irel->r_info); + shndx = shndx_buf + (shndx_buf ? ELF32_R_SYM (irel->r_info) : 0); + bfd_elf32_swap_symbol_in (abfd, esym, shndx, &isym); + + sym_sec = bfd_section_from_elf_index (abfd, isym.st_shndx); + symval = (isym.st_value + + sym_sec->output_section->vma + + sym_sec->output_offset); + } + else + { + unsigned long indx; + struct elf_link_hash_entry *h; + + /* An external symbol. */ + indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; + h = elf_sym_hashes (abfd)[indx]; + BFD_ASSERT (h != NULL); + if (h->root.type != bfd_link_hash_defined + && h->root.type != bfd_link_hash_defweak) + { + /* This appears to be a reference to an undefined + symbol. Just ignore it--it will be caught by the + regular reloc processing. */ + prev_insn_branch = 0; + prev_insn_group = 0; + continue; + } + + symval = (h->root.u.def.value + + h->root.u.def.section->output_section->vma + + h->root.u.def.section->output_offset); + } + + if (ELF32_R_TYPE (irel->r_info) == (int) R_M68HC11_RL_GROUP) + { + prev_insn_branch = 0; + prev_insn_group = 0; + + /* Do nothing if this reloc is the last byte in the section. */ + if (irel->r_offset == sec->_cooked_size) + continue; + + prev_insn_group = irel; + insn_group_value = isym.st_value; + continue; + } + + value = symval; + /* Try to turn a far branch to a near branch. */ + if (ELF32_R_TYPE (irel->r_info) == (int) R_M68HC11_16 + && prev_insn_branch) + { + bfd_vma offset; + unsigned char code; + + offset = value - (prev_insn_branch->r_offset + + sec->output_section->vma + + sec->output_offset + 2); + + /* If the offset is still out of -128..+127 range, + leave that far branch unchanged. */ + if ((offset & 0xff80) != 0 && (offset & 0xff80) != 0xff80) + { + prev_insn_branch = 0; + continue; + } + + /* Shrink the branch. */ + code = bfd_get_8 (abfd, contents + prev_insn_branch->r_offset); + if (code == 0x7e) + { + code = 0x20; + bfd_put_8 (abfd, code, contents + prev_insn_branch->r_offset); + bfd_put_8 (abfd, offset, + contents + prev_insn_branch->r_offset + 1); + irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), + R_M68HC11_NONE); + m68hc11_elf_relax_delete_bytes (abfd, sec, + irel->r_offset, 1); + } + else + { + code ^= 0x1; + bfd_put_8 (abfd, code, contents + prev_insn_branch->r_offset); + bfd_put_8 (abfd, offset, + contents + prev_insn_branch->r_offset + 1); + irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), + R_M68HC11_NONE); + m68hc11_elf_relax_delete_bytes (abfd, sec, + irel->r_offset - 1, 3); + } + prev_insn_branch = 0; + } + + /* Try to turn a 16 bit address into a 8 bit page0 address. */ + else if (ELF32_R_TYPE (irel->r_info) == (int) R_M68HC11_16 + && (value & 0xff00) == 0) + { + unsigned char code; + unsigned short offset; + struct m68hc11_direct_relax *rinfo; + + prev_insn_branch = 0; + offset = bfd_get_16 (abfd, contents + irel->r_offset); + offset += value; + if ((offset & 0xff00) != 0) + { + prev_insn_group = 0; + continue; + } + + if (prev_insn_group) + { + /* Note that we've changed the reldection contents, etc. */ + elf_section_data (sec)->relocs = internal_relocs; + free_relocs = NULL; + + elf_section_data (sec)->this_hdr.contents = contents; + free_contents = NULL; + + symtab_hdr->contents = (bfd_byte *) extsyms; + free_extsyms = NULL; + + m68hc11_relax_group (abfd, sec, contents, offset, + prev_insn_group->r_offset, + insn_group_value); + irel = prev_insn_group; + prev_insn_group = 0; + irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), + R_M68HC11_NONE); + continue; + } + + /* Get the opcode. */ + code = bfd_get_8 (abfd, contents + irel->r_offset - 1); + rinfo = find_relaxable_insn (code); + if (rinfo == 0) + { + prev_insn_group = 0; + continue; + } + + /* Note that we've changed the reldection contents, etc. */ + elf_section_data (sec)->relocs = internal_relocs; + free_relocs = NULL; + + elf_section_data (sec)->this_hdr.contents = contents; + free_contents = NULL; + + symtab_hdr->contents = (bfd_byte *) extsyms; + free_extsyms = NULL; + + /* Fix the opcode. */ + /* printf ("A relaxable case : 0x%02x (%s)\n", + code, rinfo->name); */ + bfd_put_8 (abfd, rinfo->direct_code, + contents + irel->r_offset - 1); + + /* Delete one byte of data (upper byte of address). */ + m68hc11_elf_relax_delete_bytes (abfd, sec, irel->r_offset, 1); + + /* Fix the relocation's type. */ + irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), + R_M68HC11_8); + + /* That will change things, so, we should relax again. + Note that this is not required, and it may be slow. */ + *again = true; + } + else if (ELF32_R_TYPE (irel->r_info) == R_M68HC11_16) + { + unsigned char code; + bfd_vma offset; + + prev_insn_branch = 0; + code = bfd_get_8 (abfd, contents + irel->r_offset - 1); + if (code == 0x7e) + { + offset = value - (irel->r_offset + + sec->output_section->vma + + sec->output_offset + 1); + offset += bfd_get_16 (abfd, contents + irel->r_offset); + + /* If the offset is still out of -128..+127 range, + leave that far branch unchanged. */ + if ((offset & 0xff80) == 0 || (offset & 0xff80) == 0xff80) + { + + /* Note that we've changed the reldection contents, etc. */ + elf_section_data (sec)->relocs = internal_relocs; + free_relocs = NULL; + + elf_section_data (sec)->this_hdr.contents = contents; + free_contents = NULL; + + symtab_hdr->contents = (bfd_byte *) extsyms; + free_extsyms = NULL; + + /* Shrink the branch. */ + code = 0x20; + bfd_put_8 (abfd, code, + contents + irel->r_offset - 1); + bfd_put_8 (abfd, offset, + contents + irel->r_offset); + irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), + R_M68HC11_NONE); + m68hc11_elf_relax_delete_bytes (abfd, sec, + irel->r_offset + 1, 1); + } + } + } + prev_insn_branch = 0; + } + + if (free_relocs != NULL) + { + free (free_relocs); + free_relocs = NULL; + } + + if (free_contents != NULL) + { + if (! link_info->keep_memory) + free (free_contents); + else + { + /* Cache the section contents for elf_link_input_bfd. */ + elf_section_data (sec)->this_hdr.contents = contents; + } + free_contents = NULL; + } + + if (free_extsyms != NULL) + { + if (! link_info->keep_memory) + free (free_extsyms); + else + { + /* Cache the symbols for elf_link_input_bfd. */ + symtab_hdr->contents = (unsigned char *) extsyms; + } + free_extsyms = NULL; + } + + return true; + + error_return: + if (free_relocs != NULL) + free (free_relocs); + if (free_contents != NULL) + free (free_contents); + if (free_extsyms != NULL) + free (free_extsyms); + return false; +} + +/* Delete some bytes from a section while relaxing. */ + +static void +m68hc11_elf_relax_delete_bytes (abfd, sec, addr, count) + bfd *abfd; + asection *sec; + bfd_vma addr; + int count; +{ + Elf_Internal_Shdr *symtab_hdr; + Elf_Internal_Shdr *shndx_hdr; + Elf32_External_Sym *extsyms; + unsigned int sec_shndx; + Elf_External_Sym_Shndx *shndx; + bfd_byte *contents; + Elf_Internal_Rela *irel, *irelend; + bfd_vma toaddr; + Elf32_External_Sym *esym, *esymend; + struct elf_link_hash_entry **sym_hashes; + struct elf_link_hash_entry **end_hashes; + unsigned int symcount; + + symtab_hdr = &elf_tdata (abfd)->symtab_hdr; + extsyms = (Elf32_External_Sym *) symtab_hdr->contents; + + sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); + + contents = elf_section_data (sec)->this_hdr.contents; + + toaddr = sec->_cooked_size; + + irel = elf_section_data (sec)->relocs; + irelend = irel + sec->reloc_count; + + /* Actually delete the bytes. */ + memmove (contents + addr, contents + addr + count, + (size_t) (toaddr - addr - count)); + sec->_cooked_size -= count; + + /* Adjust all the relocs. */ + for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++) + { + unsigned char code; + unsigned char offset; + unsigned short raddr; + unsigned long old_offset; + int branch_pos; + + old_offset = irel->r_offset; + + /* See if this reloc was for the bytes we have deleted, in which + case we no longer care about it. Don't delete relocs which + represent addresses, though. */ + if (ELF32_R_TYPE (irel->r_info) != R_M68HC11_RL_JUMP + && irel->r_offset >= addr && irel->r_offset < addr + count) + irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), + R_M68HC11_NONE); + + if (ELF32_R_TYPE (irel->r_info) == R_M68HC11_NONE) + continue; + + /* Get the new reloc address. */ + if ((irel->r_offset > addr + && irel->r_offset < toaddr)) + irel->r_offset -= count; + + /* If this is a PC relative reloc, see if the range it covers + includes the bytes we have deleted. */ + switch (ELF32_R_TYPE (irel->r_info)) + { + default: + break; + + case R_M68HC11_RL_JUMP: + code = bfd_get_8 (abfd, contents + irel->r_offset); + switch (code) + { + /* jsr and jmp instruction are also marked with RL_JUMP + relocs but no adjustment must be made. */ + case 0x7e: + case 0x9d: + case 0xbd: + continue; + + case 0x12: + case 0x13: + branch_pos = 3; + raddr = 4; + + /* Special case when we translate a brclr N,y into brclr * + In this case, the 0x18 page2 prefix is removed. + The reloc offset is not modified but the instruction + size is reduced by 1. */ + if (old_offset == addr) + raddr++; + break; + + case 0x1e: + case 0x1f: + branch_pos = 3; + raddr = 4; + break; + + case 0x18: + branch_pos = 4; + raddr = 5; + break; + + default: + branch_pos = 1; + raddr = 2; + break; + } + offset = bfd_get_8 (abfd, contents + irel->r_offset + branch_pos); + raddr += old_offset; + raddr += ((unsigned short) offset | ((offset & 0x80) ? 0xff00 : 0)); + if (irel->r_offset < addr && raddr >= addr) + { + offset -= count; + bfd_put_8 (abfd, offset, contents + irel->r_offset + branch_pos); + } + else if (irel->r_offset >= addr && raddr <= addr) + { + offset += count; + bfd_put_8 (abfd, offset, contents + irel->r_offset + branch_pos); + } + else + { + /*printf ("Not adjusted 0x%04x [0x%4x 0x%4x]\n", raddr, + irel->r_offset, addr);*/ + } + + break; + } + } + + /* Adjust the local symbols defined in this section. */ + shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr; + shndx = (Elf_External_Sym_Shndx *) shndx_hdr->contents; + esym = extsyms; + esymend = esym + symtab_hdr->sh_info; + for (; esym < esymend; esym++, shndx = (shndx ? shndx + 1 : NULL)) + { + Elf_Internal_Sym isym; + Elf_External_Sym_Shndx dummy; + + bfd_elf32_swap_symbol_in (abfd, esym, shndx, &isym); + + if (isym.st_shndx == sec_shndx + && isym.st_value > addr + && isym.st_value < toaddr) + { + isym.st_value -= count; + bfd_elf32_swap_symbol_out (abfd, &isym, esym, &dummy); + } + } + + /* Now adjust the global symbols defined in this section. */ + symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) + - symtab_hdr->sh_info); + sym_hashes = elf_sym_hashes (abfd); + end_hashes = sym_hashes + symcount; + for (; sym_hashes < end_hashes; sym_hashes++) + { + struct elf_link_hash_entry *sym_hash = *sym_hashes; + if ((sym_hash->root.type == bfd_link_hash_defined + || sym_hash->root.type == bfd_link_hash_defweak) + && sym_hash->root.u.def.section == sec + && sym_hash->root.u.def.value > addr + && sym_hash->root.u.def.value < toaddr) + { + sym_hash->root.u.def.value -= count; + } + } +} + +/* Look through the relocs for a section during the first phase. + Since we don't do .gots or .plts, we just need to consider the + virtual table relocs for gc. */ + +static boolean +elf32_m68hc11_check_relocs (abfd, info, sec, relocs) + bfd * abfd; + struct bfd_link_info * info; + asection * sec; + const Elf_Internal_Rela * relocs; +{ + Elf_Internal_Shdr * symtab_hdr; + struct elf_link_hash_entry ** sym_hashes; + struct elf_link_hash_entry ** sym_hashes_end; + const Elf_Internal_Rela * rel; + const Elf_Internal_Rela * rel_end; + + if (info->relocateable) + return true; + + symtab_hdr = & elf_tdata (abfd)->symtab_hdr; + sym_hashes = elf_sym_hashes (abfd); + sym_hashes_end = sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym); + if (!elf_bad_symtab (abfd)) + sym_hashes_end -= symtab_hdr->sh_info; + + rel_end = relocs + sec->reloc_count; + + for (rel = relocs; rel < rel_end; rel++) + { + struct elf_link_hash_entry * h; + unsigned long r_symndx; + + r_symndx = ELF32_R_SYM (rel->r_info); + + if (r_symndx < symtab_hdr->sh_info) + h = NULL; + else + h = sym_hashes [r_symndx - symtab_hdr->sh_info]; + + switch (ELF32_R_TYPE (rel->r_info)) + { + /* This relocation describes the C++ object vtable hierarchy. + Reconstruct it for later use during GC. */ + case R_M68HC11_GNU_VTINHERIT: + if (!_bfd_elf32_gc_record_vtinherit (abfd, sec, h, rel->r_offset)) + return false; + break; + + /* This relocation describes which C++ vtable entries are actually + used. Record for later use during GC. */ + case R_M68HC11_GNU_VTENTRY: + if (!_bfd_elf32_gc_record_vtentry (abfd, sec, h, rel->r_addend)) + return false; + break; + } + } + + return true; +} + +/* Relocate a 68hc11/68hc12 ELF section. */ +static boolean +elf32_m68hc11_relocate_section (output_bfd, info, input_bfd, input_section, + contents, relocs, local_syms, local_sections) + bfd *output_bfd ATTRIBUTE_UNUSED; + struct bfd_link_info *info; + bfd *input_bfd; + asection *input_section; + bfd_byte *contents; + Elf_Internal_Rela *relocs; + Elf_Internal_Sym *local_syms; + asection **local_sections; +{ + Elf_Internal_Shdr *symtab_hdr; + struct elf_link_hash_entry **sym_hashes; + Elf_Internal_Rela *rel, *relend; + const char *name; + + symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; + sym_hashes = elf_sym_hashes (input_bfd); + + rel = relocs; + relend = relocs + input_section->reloc_count; + for (; rel < relend; rel++) + { + int r_type; + reloc_howto_type *howto; + unsigned long r_symndx; + Elf_Internal_Sym *sym; + asection *sec; + struct elf_link_hash_entry *h; + bfd_vma relocation; + bfd_reloc_status_type r; + + r_symndx = ELF32_R_SYM (rel->r_info); + r_type = ELF32_R_TYPE (rel->r_info); + + if (r_type == R_M68HC11_GNU_VTENTRY + || r_type == R_M68HC11_GNU_VTINHERIT ) + continue; + + howto = elf_m68hc11_howto_table + r_type; + + if (info->relocateable) + { + /* This is a relocateable link. We don't have to change + anything, unless the reloc is against a section symbol, + in which case we have to adjust according to where the + section symbol winds up in the output section. */ + if (r_symndx < symtab_hdr->sh_info) + { + sym = local_syms + r_symndx; + if (ELF_ST_TYPE (sym->st_info) == STT_SECTION) + { + sec = local_sections[r_symndx]; + rel->r_addend += sec->output_offset + sym->st_value; + } + } + + continue; + } + + /* This is a final link. */ + h = NULL; + sym = NULL; + sec = NULL; + if (r_symndx < symtab_hdr->sh_info) + { + sym = local_syms + r_symndx; + sec = local_sections[r_symndx]; + relocation = (sec->output_section->vma + + sec->output_offset + + sym->st_value); + } + else + { + h = sym_hashes[r_symndx - symtab_hdr->sh_info]; + while (h->root.type == bfd_link_hash_indirect + || h->root.type == bfd_link_hash_warning) + h = (struct elf_link_hash_entry *) h->root.u.i.link; + if (h->root.type == bfd_link_hash_defined + || h->root.type == bfd_link_hash_defweak) + { + sec = h->root.u.def.section; + relocation = (h->root.u.def.value + + sec->output_section->vma + + sec->output_offset); + } + else if (h->root.type == bfd_link_hash_undefweak) + relocation = 0; + else + { + if (!((*info->callbacks->undefined_symbol) + (info, h->root.root.string, input_bfd, + input_section, rel->r_offset, true))) + return false; + relocation = 0; + } + } + + if (h != NULL) + name = h->root.root.string; + else + { + name = (bfd_elf_string_from_elf_section + (input_bfd, symtab_hdr->sh_link, sym->st_name)); + if (name == NULL || *name == '\0') + name = bfd_section_name (input_bfd, sec); + } + + r = _bfd_final_link_relocate (howto, input_bfd, input_section, + contents, rel->r_offset, + relocation, rel->r_addend); + + if (r != bfd_reloc_ok) + { + const char * msg = (const char *) 0; + + switch (r) + { + case bfd_reloc_overflow: + if (!((*info->callbacks->reloc_overflow) + (info, name, howto->name, (bfd_vma) 0, + input_bfd, input_section, rel->r_offset))) + return false; + break; + + case bfd_reloc_undefined: + if (!((*info->callbacks->undefined_symbol) + (info, name, input_bfd, input_section, + rel->r_offset, true))) + return false; + break; + + case bfd_reloc_outofrange: + msg = _ ("internal error: out of range error"); + goto common_error; + + case bfd_reloc_notsupported: + msg = _ ("internal error: unsupported relocation error"); + goto common_error; + + case bfd_reloc_dangerous: + msg = _ ("internal error: dangerous error"); + goto common_error; + + default: + msg = _ ("internal error: unknown error"); + /* fall through */ + + common_error: + if (!((*info->callbacks->warning) + (info, msg, name, input_bfd, input_section, + rel->r_offset))) + return false; + break; + } + } + } + + return true; +} + + /* Set and control ELF flags in ELF header. */ @@ -582,8 +1631,11 @@ _bfd_m68hc11_elf_print_private_bfd_data (abfd, ptr) #define elf_info_to_howto 0 #define elf_info_to_howto_rel m68hc11_info_to_howto_rel +#define bfd_elf32_bfd_relax_section m68hc11_elf_relax_section #define elf_backend_gc_mark_hook elf32_m68hc11_gc_mark_hook #define elf_backend_gc_sweep_hook elf32_m68hc11_gc_sweep_hook +#define elf_backend_check_relocs elf32_m68hc11_check_relocs +#define elf_backend_relocate_section elf32_m68hc11_relocate_section #define elf_backend_object_p 0 #define elf_backend_final_write_processing 0 #define elf_backend_can_gc_sections 1 -- 2.30.2