From 20250e854eca3209133d592d98559ac474a5f60f Mon Sep 17 00:00:00 2001 From: Neil Roberts Date: Wed, 16 Sep 2015 11:48:42 +0100 Subject: [PATCH] i965: Program 16x MSAA sample positions. This is the standard pattern used by the other 3D graphics API. BDW has slots for these values, but they aren't actually used until SKL. Even though the documentation for BDW says they must be zero, it doesn't seem to cause any harm to program them anyway. The comment above for the 8x sample positions says that the hardware implements centroid interpolation by picking the centre-most sample that is inside the primitive. That implies that it might be worthwhile to pick a pattern that includes 0.5,0.5. However by experimentation this doesn't seem to actually be the case. With the sample positions in this patch, if I modify the piglit test below so that it instead reports the centroid position, it reports 0.492188,0.421875 which doesn't match any of the positions. If I modify the sample positions so that they include one at exactly 0.5,0.5 it doesn't help and it reports another position which is even further from the center for some reason. arb_gpu_shader5-interpolateAtSample-different Kenneth Graunke experimented with some other patterns that have a higher standard deviation but I think after some discussion it was decided that it would be better to pick the same pattern as the other graphics API in case there are games that rely on this pattern. (Based on a patch by Kenneth Graunke) Cc: Kenneth Graunke Reviewed-by: Ben Widawsky --- .../drivers/dri/i965/brw_multisample_state.h | 26 +++++++++++++++++++ .../drivers/dri/i965/gen6_multisample_state.c | 3 +++ .../drivers/dri/i965/gen8_multisample_state.c | 12 ++++----- 3 files changed, 34 insertions(+), 7 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_multisample_state.h b/src/mesa/drivers/dri/i965/brw_multisample_state.h index 26633e72983..42a7fd35121 100644 --- a/src/mesa/drivers/dri/i965/brw_multisample_state.h +++ b/src/mesa/drivers/dri/i965/brw_multisample_state.h @@ -81,3 +81,29 @@ brw_multisample_positions_4x = 0xae2ae662; */ static const uint32_t brw_multisample_positions_8x[] = { 0xdbb39d79, 0x3ff55117 }; + +/** + * Sample positions: + * + * 0 1 2 3 4 5 6 7 8 9 a b c d e f + * 0 15 + * 1 9 + * 2 10 + * 3 7 + * 4 13 + * 5 1 + * 6 4 + * 7 3 + * 8 12 + * 9 0 + * a 2 + * b 6 + * c 11 + * d 5 + * e 8 + * f 14 + */ +static const uint32_t +brw_multisample_positions_16x[] = { + 0xc75a7599, 0xb3dbad36, 0x2c42816e, 0x10eff408 +}; diff --git a/src/mesa/drivers/dri/i965/gen6_multisample_state.c b/src/mesa/drivers/dri/i965/gen6_multisample_state.c index 8444c0c9bae..49c6ebabfba 100644 --- a/src/mesa/drivers/dri/i965/gen6_multisample_state.c +++ b/src/mesa/drivers/dri/i965/gen6_multisample_state.c @@ -48,6 +48,9 @@ gen6_get_sample_position(struct gl_context *ctx, case 8: bits = brw_multisample_positions_8x[index >> 2] >> (8 * (index & 3)); break; + case 16: + bits = brw_multisample_positions_16x[index >> 2] >> (8 * (index & 3)); + break; default: unreachable("Not implemented"); } diff --git a/src/mesa/drivers/dri/i965/gen8_multisample_state.c b/src/mesa/drivers/dri/i965/gen8_multisample_state.c index 75cbe06c522..4427f15996d 100644 --- a/src/mesa/drivers/dri/i965/gen8_multisample_state.c +++ b/src/mesa/drivers/dri/i965/gen8_multisample_state.c @@ -52,13 +52,11 @@ gen8_emit_3dstate_sample_pattern(struct brw_context *brw) BEGIN_BATCH(9); OUT_BATCH(_3DSTATE_SAMPLE_PATTERN << 16 | (9 - 2)); - /* 16x MSAA - * XXX: Need to program these. - */ - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); + /* 16x MSAA */ + OUT_BATCH(brw_multisample_positions_16x[0]); /* positions 3, 2, 1, 0 */ + OUT_BATCH(brw_multisample_positions_16x[1]); /* positions 7, 6, 5, 4 */ + OUT_BATCH(brw_multisample_positions_16x[2]); /* positions 11, 10, 9, 8 */ + OUT_BATCH(brw_multisample_positions_16x[3]); /* positions 15, 14, 13, 12 */ /* 8x MSAA */ OUT_BATCH(brw_multisample_positions_8x[1]); /* sample positions 7654 */ -- 2.30.2