From 202d0c11b90695a523cc7fabc5e225ab1f7e51a1 Mon Sep 17 00:00:00 2001 From: David Sherwood Date: Wed, 2 Dec 2015 16:29:17 +0000 Subject: [PATCH] aarch64.md: New pattern. 2015-12-02 David Sherwood gcc/ * config/aarch64/aarch64.md: New pattern. * config/aarch64/aarch64-simd.md: Likewise. * config/aarch64/iterators.md: New unspecs, iterators. gcc/testsuite * gcc.target/aarch64/fmaxmin.c: New test. From-SVN: r231187 --- gcc/ChangeLog | 6 ++++++ gcc/config/aarch64/aarch64-simd.md | 11 +++++++++++ gcc/config/aarch64/aarch64.md | 11 +++++++++++ gcc/config/aarch64/iterators.md | 10 ++++++++++ gcc/testsuite/ChangeLog | 4 ++++ 5 files changed, 42 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ca0b22e452a..db75d76dea3 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2015-12-02 David Sherwood + + * config/aarch64/aarch64.md: New pattern. + * config/aarch64/aarch64-simd.md: Likewise. + * config/aarch64/iterators.md: New unspecs, iterators. + 2015-12-02 Pierre-Marie de Rodat * dwarf2out.c (dwar2out_var_location): In addition to notes, diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index 7910484baf0..ae1075c2895 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -1962,6 +1962,17 @@ [(set_attr "type" "neon_fp_minmax_")] ) +;; Auto-vectorized forms for the IEEE-754 fmax()/fmin() functions +(define_insn "3" + [(set (match_operand:VDQF 0 "register_operand" "=w") + (unspec:VDQF [(match_operand:VDQF 1 "register_operand" "w") + (match_operand:VDQF 2 "register_operand" "w")] + FMAXMIN))] + "TARGET_SIMD" + "\\t%0., %1., %2." + [(set_attr "type" "neon_fp_minmax_")] +) + ;; 'across lanes' add. (define_expand "reduc_plus_scal_" diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 64a40ae3175..765df6a305e 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -4569,6 +4569,17 @@ [(set_attr "type" "f_minmax")] ) +;; Scalar forms for the IEEE-754 fmax()/fmin() functions +(define_insn "3" + [(set (match_operand:GPF 0 "register_operand" "=w") + (unspec:GPF [(match_operand:GPF 1 "register_operand" "w") + (match_operand:GPF 2 "register_operand" "w")] + FMAXMIN))] + "TARGET_FLOAT" + "\\t%0, %1, %2" + [(set_attr "type" "f_minmax")] +) + ;; For copysign (x, y), we want to generate: ;; ;; LDR d2, #(1 << 63) diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md index 9343c9cd1c8..8bdd2648f89 100644 --- a/gcc/config/aarch64/iterators.md +++ b/gcc/config/aarch64/iterators.md @@ -306,6 +306,8 @@ UNSPEC_VEC_SHR ; Used in aarch64-simd.md. UNSPEC_SQRDMLAH ; Used in aarch64-simd.md. UNSPEC_SQRDMLSH ; Used in aarch64-simd.md. + UNSPEC_FMAXNM ; Used in aarch64-simd.md. + UNSPEC_FMINNM ; Used in aarch64-simd.md. ]) ;; ------------------------------------------------------------------ @@ -948,6 +950,8 @@ (define_int_iterator FMAXMIN_UNS [UNSPEC_FMAX UNSPEC_FMIN]) +(define_int_iterator FMAXMIN [UNSPEC_FMAXNM UNSPEC_FMINNM]) + (define_int_iterator VQDMULH [UNSPEC_SQDMULH UNSPEC_SQRDMULH]) (define_int_iterator USSUQADD [UNSPEC_SUQADD UNSPEC_USQADD]) @@ -1040,6 +1044,12 @@ (UNSPEC_FMINNMV "fminnm") (UNSPEC_FMINV "fmin")]) +(define_int_attr fmaxmin [(UNSPEC_FMAXNM "fmax") + (UNSPEC_FMINNM "fmin")]) + +(define_int_attr fmaxmin_op [(UNSPEC_FMAXNM "fmaxnm") + (UNSPEC_FMINNM "fminnm")]) + (define_int_attr sur [(UNSPEC_SHADD "s") (UNSPEC_UHADD "u") (UNSPEC_SRHADD "sr") (UNSPEC_URHADD "ur") (UNSPEC_SHSUB "s") (UNSPEC_UHSUB "u") diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 4f7af876162..e867353ee5b 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2015-12-02 David Sherwood + + * gcc.target/aarch64/fmaxmin.c: New test. + 2015-12-02 Thomas Schwinge * gfortran.dg/goacc/coarray.f95: XFAIL. -- 2.30.2