From 20a4ed6f01a244c39fe45caf20938fa86b3e33aa Mon Sep 17 00:00:00 2001 From: Matthew Poremba Date: Tue, 14 Apr 2020 18:39:47 -0700 Subject: [PATCH] arch-x86: Change insertBits in TLB translateFunctional x86 TLB::translateFunctional inserts one too many bits from the virtual address leading to an incorrect physical address occasionally. Change-Id: I2cc551c496f7ce729ea440ef01a680c0de257269 JIRA: https://gem5.atlassian.net/browse/GEM5-442 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27827 Reviewed-by: Bobby R. Bruce Reviewed-by: Gabe Black Maintainer: Bobby R. Bruce Maintainer: Gabe Black Tested-by: Gem5 Cloud Project GCB service account <345032938727@cloudbuild.gserviceaccount.com> Tested-by: kokoro --- src/arch/x86/tlb.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc index baeeb66bd..ceccba892 100644 --- a/src/arch/x86/tlb.cc +++ b/src/arch/x86/tlb.cc @@ -473,7 +473,7 @@ TLB::translateFunctional(const RequestPtr &req, ThreadContext *tc, Mode mode) Fault fault = walker->startFunctional(tc, addr, logBytes, mode); if (fault != NoFault) return fault; - paddr = insertBits(addr, logBytes, 0, vaddr); + paddr = insertBits(addr, logBytes - 1, 0, vaddr); } else { Process *process = tc->getProcessPtr(); const auto *pte = process->pTable->lookup(vaddr); -- 2.30.2