From 2107f2d92a7e84387335680e8e5e195f6dfde288 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sat, 28 Mar 2020 17:21:13 +0000 Subject: [PATCH] cleanup tables --- openpower/isa/branch.mdwn | 63 +++++++++--------------------------- openpower/isa/condition.mdwn | 4 +-- 2 files changed, 17 insertions(+), 50 deletions(-) diff --git a/openpower/isa/branch.mdwn b/openpower/isa/branch.mdwn index e908a6388..26222be8d 100644 --- a/openpower/isa/branch.mdwn +++ b/openpower/isa/branch.mdwn @@ -1,19 +1,12 @@ # Branch -b -ba -bl -bla +b target_addr (AA=0 LK=0) -target_addr -target_addr -target_addr -target_addr +ba target_addr (AA=1 LK=0) -(AA=0 LK=0) -(AA=1 LK=0) -(AA=0 LK=1) -(AA=1 LK=1) +bl target_addr (AA=0 LK=1) + +bla target_addr (AA=1 LK=1) if AA then NIA <-iea EXTS(LI || 0b00) else NIA <-iea CIA + EXTS(LI || 0b00) @@ -21,20 +14,13 @@ target_addr # Branch Conditional -bc -bca -bcl -bcla +bc BO,BI,target_addr (AA=0 LK=0) + +bca BO,BI,target_addr (AA=1 LK=0) -BO,BI,target_addr -BO,BI,target_addr -BO,BI,target_addr -BO,BI,target_addr +bcl BO,BI,target_addr (AA=0 LK=1) -(AA=0 LK=0) -(AA=1 LK=0) -(AA=0 LK=1) -(AA=1 LK=1) +bcla BO,BI,target_addr (AA=1 LK=1) if (64-bit mode) then M <- 0 @@ -49,16 +35,9 @@ BO,BI,target_addr # Branch Conditional to Link Register -XL-form - -bclr -bclrl +bclr BO,BI,BH (LK=0) -BO,BI,BH -BO,BI,BH - -(LK=0) -(LK=1) +bclrl BO,BI,BH (LK=1) if (64-bit mode) then M <- 0 @@ -71,14 +50,9 @@ BO,BI,BH # Branch Conditional to Count Register -bcctr -bcctrl - -BO,BI,BH -BO,BI,BH +bcctr BO,BI,BH (LK=0) -(LK=0) -(LK=1) +bcctrl BO,BI,BH (LK=1) cond_ok <- BO[0] | (CR[BI+32] => BO[1]) if cond_ok then NIA <-iea CTR[0:61] || 0b00 @@ -87,14 +61,9 @@ BO,BI,BH # Branch Conditional to Branch Target Address Register -bctar -bctarl - -BO,BI,BH -BO,BI,BH +bctar BO,BI,BH (LK=0) -(LK=0) -(LK=1) +bctarl BO,BI,BH (LK=1) if (64-bit mode) then M <- 0 diff --git a/openpower/isa/condition.mdwn b/openpower/isa/condition.mdwn index 4f181d0e3..b5d7abd00 100644 --- a/openpower/isa/condition.mdwn +++ b/openpower/isa/condition.mdwn @@ -16,7 +16,7 @@ cror BT,BA,BB CR[BT+32] <- CR[BA+32] | CR[BB+32] -Condition Register XOR +# Condition Register XOR crxor BT,BA,BB @@ -46,11 +46,9 @@ crorc BT,BA,BB CR[BT+32] <- CR[BA+32] | ¬CR[BB+32] - # Move Condition Register Field mcrf BF,BFA CR[4*BF+32:4*BF+35] <- CR[4*BFA+32:4*BFA+35] - -- 2.30.2