From 212fb8adbd0e5e28a5d20b0cc03cde46df2831f4 Mon Sep 17 00:00:00 2001 From: Keith Whitwell Date: Fri, 6 Nov 2009 10:24:19 +0000 Subject: [PATCH] i965g: don't set up vs stack register for non-branching shaders --- src/gallium/drivers/i965/brw_context.h | 2 ++ src/gallium/drivers/i965/brw_pipe_shader.c | 20 ++++++++++---------- src/gallium/drivers/i965/brw_vs_emit.c | 11 ++++++++--- src/gallium/drivers/i965/brw_wm.c | 3 --- src/gallium/drivers/i965/brw_wm.h | 1 - 5 files changed, 20 insertions(+), 17 deletions(-) diff --git a/src/gallium/drivers/i965/brw_context.h b/src/gallium/drivers/i965/brw_context.h index 34799d52114..b81dff0aa05 100644 --- a/src/gallium/drivers/i965/brw_context.h +++ b/src/gallium/drivers/i965/brw_context.h @@ -154,6 +154,8 @@ struct brw_vertex_shader { const struct tgsi_token *tokens; struct tgsi_shader_info info; + unsigned has_flow_control:1; + unsigned id; struct brw_winsys_buffer *const_buffer; /** Program constant buffer/surface */ GLboolean use_const_buffer; diff --git a/src/gallium/drivers/i965/brw_pipe_shader.c b/src/gallium/drivers/i965/brw_pipe_shader.c index 662c43c3e5f..44f9ad6f9cd 100644 --- a/src/gallium/drivers/i965/brw_pipe_shader.c +++ b/src/gallium/drivers/i965/brw_pipe_shader.c @@ -43,15 +43,15 @@ * Determine if the given shader uses complex features such as flow * conditionals, loops, subroutines. */ -GLboolean brw_wm_has_flow_control(const struct brw_fragment_shader *fp) +static GLboolean has_flow_control(const struct tgsi_shader_info *info) { - return (fp->info.opcode_count[TGSI_OPCODE_ARL] > 0 || - fp->info.opcode_count[TGSI_OPCODE_IF] > 0 || - fp->info.opcode_count[TGSI_OPCODE_ENDIF] > 0 || /* redundant - IF */ - fp->info.opcode_count[TGSI_OPCODE_CAL] > 0 || - fp->info.opcode_count[TGSI_OPCODE_BRK] > 0 || /* redundant - BGNLOOP */ - fp->info.opcode_count[TGSI_OPCODE_RET] > 0 || /* redundant - CAL */ - fp->info.opcode_count[TGSI_OPCODE_BGNLOOP] > 0); + return (info->opcode_count[TGSI_OPCODE_ARL] > 0 || + info->opcode_count[TGSI_OPCODE_IF] > 0 || + info->opcode_count[TGSI_OPCODE_ENDIF] > 0 || /* redundant - IF */ + info->opcode_count[TGSI_OPCODE_CAL] > 0 || + info->opcode_count[TGSI_OPCODE_BRK] > 0 || /* redundant - BGNLOOP */ + info->opcode_count[TGSI_OPCODE_RET] > 0 || /* redundant - CAL */ + info->opcode_count[TGSI_OPCODE_BGNLOOP] > 0); } @@ -88,7 +88,7 @@ static void *brw_create_fs_state( struct pipe_context *pipe, /* Duplicate tokens, scan shader */ fs->id = brw->program_id++; - fs->has_flow_control = brw_wm_has_flow_control(fs); + fs->has_flow_control = has_flow_control(&fs->info); fs->tokens = tgsi_dup_tokens(shader->tokens); if (fs->tokens == NULL) @@ -126,7 +126,7 @@ static void *brw_create_vs_state( struct pipe_context *pipe, /* Duplicate tokens, scan shader */ vs->id = brw->program_id++; - //vs->has_flow_control = brw_wm_has_flow_control(vs); + vs->has_flow_control = has_flow_control(&vs->info); vs->tokens = tgsi_dup_tokens(shader->tokens); if (vs->tokens == NULL) diff --git a/src/gallium/drivers/i965/brw_vs_emit.c b/src/gallium/drivers/i965/brw_vs_emit.c index 25aea87b8f9..e0fadc8dce7 100644 --- a/src/gallium/drivers/i965/brw_vs_emit.c +++ b/src/gallium/drivers/i965/brw_vs_emit.c @@ -252,8 +252,10 @@ static void brw_vs_alloc_regs( struct brw_vs_compile *c ) } #endif - c->stack = brw_uw16_reg(BRW_GENERAL_REGISTER_FILE, reg, 0); - reg += 2; + if (c->vp->has_flow_control) { + c->stack = brw_uw16_reg(BRW_GENERAL_REGISTER_FILE, reg, 0); + reg += 2; + } /* Some opcodes need an internal temporary: */ @@ -1592,7 +1594,10 @@ void brw_vs_emit(struct brw_vs_compile *c) /* Static register allocation */ brw_vs_alloc_regs(c); - brw_MOV(p, get_addr_reg(c->stack_index), brw_address(c->stack)); + + if (c->vp->has_flow_control) { + brw_MOV(p, get_addr_reg(c->stack_index), brw_address(c->stack)); + } /* Instructions */ diff --git a/src/gallium/drivers/i965/brw_wm.c b/src/gallium/drivers/i965/brw_wm.c index 93f90bf3298..7f2cb152563 100644 --- a/src/gallium/drivers/i965/brw_wm.c +++ b/src/gallium/drivers/i965/brw_wm.c @@ -162,9 +162,6 @@ static enum pipe_error do_wm_prog( struct brw_context *brw, brw_init_compile(brw, &c->func); - /* temporary sanity check assertion */ - assert(fp->has_flow_control == brw_wm_has_flow_control(c->fp)); - /* * Shader which use GLSL features such as flow control are handled * differently from "simple" shaders. diff --git a/src/gallium/drivers/i965/brw_wm.h b/src/gallium/drivers/i965/brw_wm.h index 48dac397561..28d216260e5 100644 --- a/src/gallium/drivers/i965/brw_wm.h +++ b/src/gallium/drivers/i965/brw_wm.h @@ -338,7 +338,6 @@ void brw_wm_lookup_iz( GLuint line_aa, GLboolean ps_uses_depth, struct brw_wm_prog_key *key ); -GLboolean brw_wm_has_flow_control(const struct brw_fragment_shader *fp); void brw_wm_branching_shader_emit(struct brw_context *brw, struct brw_wm_compile *c); void emit_ddxy(struct brw_compile *p, -- 2.30.2