From 2163b9bcc627eb42ba5e629e54567b9f106e2f32 Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Thu, 8 Jun 2017 19:28:19 +0200 Subject: [PATCH] re PR target/81015 (Bad codegen for __builtin_clz(unsigned short)) PR target/81015 Revert: 2016-12-14 Uros Bizjak PR target/59874 * config/i386/i386.md (*ctzhi2): New insn_and_split pattern. (*clzhi2): Ditto. testsuite/ChangeLog: PR target/81015 * gcc.target/i386/pr59874-1.c (foo): Call __builtin_ctzs. * gcc.target/i386/pr59874-2.c (foo): Call __builtin_clzs. * gcc.target/i386/pr81015.c: New test. From-SVN: r249028 --- gcc/ChangeLog | 114 ++++++++++++---------- gcc/config/i386/i386.md | 36 ------- gcc/testsuite/ChangeLog | 11 ++- gcc/testsuite/gcc.target/i386/pr59874-1.c | 2 +- gcc/testsuite/gcc.target/i386/pr59874-2.c | 2 +- gcc/testsuite/gcc.target/i386/pr81015.c | 21 ++++ 6 files changed, 94 insertions(+), 92 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr81015.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 697ed16728c..d5b003ee86d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2017-06-08 Uros Bizjak + + PR target/81015 + Revert: + 2016-12-14 Uros Bizjak + + PR target/59874 + * config/i386/i386.md (*ctzhi2): New insn_and_split pattern. + (*clzhi2): Ditto. + 2017-06-08 Jan Hubicka * predict.c (unlikely_executed_edge_p): Move ahead. @@ -183,15 +193,15 @@ built-in functions was implemented as int not long long. Fix sign of return value for the unsigned version of vec_mulo and vec_mule. vector unsigned long long vec_bperm (vector unsigned long long, - vector unsigned char) + vector unsigned char) vector signed long long vec_mule (vector signed int, - vector signed int) + vector signed int) vector unsigned long long vec_mule (vector unsigned int, - vector unsigned int) + vector unsigned int) vector signed long long vec_mulo (vector signed int, - vector signed int) + vector signed int) vector unsigned long long vec_mulo (vector unsigned int, - vector unsigned int) + vector unsigned int) * doc/extend.texi: Fix the documentation for the built-in functions. @@ -543,26 +553,26 @@ 2017-06-06 Maxim Kuvyrkov - * tree-ssa-loop-prefetch.c (struct mem_ref_group, struct mem_ref): - New "uid" fields to hold pretty-print IDs of group and ref. - Memory references are now identified as : - instead of using [random] addresses. - (dump_mem_details): Simplify, no functional change. - (dump_mem_ref): Simplify and make output more concise. - Replace couple of fprintf's throughout code with calls to dump_mem_ref. - (find_or_create_group): Initialize group uid. - (record_ref): Initialize ref uid. Improve debug output. - (prune_group_by_reuse, should_issue_prefetch_p,) - (should_issue_prefetch_p, schedule_prefetches, issue_prefetch_ref,) - (mark_nontemporal_store, determine_loop_nest_reuse): - Improve debug output. + * tree-ssa-loop-prefetch.c (struct mem_ref_group, struct mem_ref): + New "uid" fields to hold pretty-print IDs of group and ref. + Memory references are now identified as : + instead of using [random] addresses. + (dump_mem_details): Simplify, no functional change. + (dump_mem_ref): Simplify and make output more concise. + Replace couple of fprintf's throughout code with calls to dump_mem_ref. + (find_or_create_group): Initialize group uid. + (record_ref): Initialize ref uid. Improve debug output. + (prune_group_by_reuse, should_issue_prefetch_p,) + (should_issue_prefetch_p, schedule_prefetches, issue_prefetch_ref,) + (mark_nontemporal_store, determine_loop_nest_reuse): + Improve debug output. 2017-06-06 Maxim Kuvyrkov - * dbgcnt.def (prefetch): New debug counter. - * tree-ssa-loop-prefetch.c (dbgcnt.h): New include. - (schedule_prefetches): Stop issueing prefetches if debug counter - tripped. + * dbgcnt.def (prefetch): New debug counter. + * tree-ssa-loop-prefetch.c (dbgcnt.h): New include. + (schedule_prefetches): Stop issueing prefetches if debug counter + tripped. 2017-06-06 Tom de Vries @@ -1233,9 +1243,9 @@ 2017-05-31 Sebastian Peryt * config/i386/avx512fintrin.h (_mm_mask_max_sd) - (_mm_maskz_max_sd, _mm_mask_max_ss, _mm_maskz_max_ss) - (_mm_mask_min_sd, _mm_maskz_min_sd, _mm_mask_min_ss) - (_mm_maskz_min_ss): New intrinsics. + (_mm_maskz_max_sd, _mm_mask_max_ss, _mm_maskz_max_ss) + (_mm_mask_min_sd, _mm_maskz_min_sd, _mm_mask_min_ss) + (_mm_maskz_min_ss): New intrinsics. 2017-05-31 Martin Liska @@ -2438,39 +2448,39 @@ * config/rs6000/rs6000-c: Add support for built-in functions vector unsigned long long vec_bperm (vector unsigned long long, - vector unsigned char) + vector unsigned char) vector signed long long vec_mule (vector signed int, - vector signed int) + vector signed int) vector unsigned long long vec_mule (vector unsigned int, - vector unsigned int) + vector unsigned int) vector signed long long vec_mulo (vector signed int, - vector signed int) + vector signed int) vector unsigned long long vec_mulo (vector unsigned int, - vector unsigned int) + vector unsigned int) vector signed char vec_sldw (vector signed char, - vector signed char, - const int) + vector signed char, + const int) vector unsigned char vec_sldw (vector unsigned char, - vector unsigned char, - const int) + vector unsigned char, + const int) vector signed short vec_sldw (vector signed short, - vector signed short, - const int) + vector signed short, + const int) vector unsigned short vec_sldw (vector unsigned short, - vector unsigned short, - const int) + vector unsigned short, + const int) vector signed int vec_sldw (vector signed int, - vector signed int, - const int) + vector signed int, + const int) vector unsigned int vec_sldw (vector unsigned int, - vector unsigned int, - const int) + vector unsigned int, + const int) vector signed long long vec_sldw (vector signed long long, - vector signed long long, - const int) + vector signed long long, + const int) vector unsigned long long vec_sldw (vector unsigned long long, - vector unsigned long long, - const int) + vector unsigned long long, + const int) * config/rs6000/rs6000-c: Add support for built-in functions * config/rs6000/rs6000-builtin.def: Add definition for SLDW. * config/rs6000/altivec.h: Add defintion for vec_sldw. @@ -3562,12 +3572,12 @@ 2017-05-10 Carl Love * config/rs6000/rs6000-c: Add support for built-in functions - vector signed char vec_neg (vector signed char) - vector signed short int vec_neg (vector short int) - vector signed int vec_neg (vector signed int) - vector signed long long vec_neg (vector signed long long) - vector float vec_neg (vector float) - vector double vec_neg (vector double) + vector signed char vec_neg (vector signed char) + vector signed short int vec_neg (vector short int) + vector signed int vec_neg (vector signed int) + vector signed long long vec_neg (vector signed long long) + vector float vec_neg (vector float) + vector double vec_neg (vector double) * config/rs6000/rs6000-builtin.def: Add definitions for NEG function overload. * config/rs6000/altivec.h: Add define for vec_neg diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index a2a163a65b0..adc13a9afbc 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -12762,24 +12762,6 @@ (set_attr "znver1_decode" "vector") (set_attr "mode" "")]) -(define_insn_and_split "*ctzhi2" - [(set (match_operand:SI 0 "register_operand") - (ctz:SI - (zero_extend:SI (match_operand:HI 1 "nonimmediate_operand")))) - (clobber (reg:CC FLAGS_REG))] - "TARGET_BMI - && can_create_pseudo_p ()" - "#" - "&& 1" - [(const_int 0)] -{ - rtx tmp = gen_reg_rtx (HImode); - - emit_insn (gen_tzcnt_hi (tmp, operands[1])); - emit_insn (gen_zero_extendhisi2 (operands[0], tmp)); - DONE; -}) - (define_insn_and_split "ctz2" [(set (match_operand:SWI48 0 "register_operand" "=r") (ctz:SWI48 @@ -12899,24 +12881,6 @@ operands[2] = GEN_INT (GET_MODE_BITSIZE (mode)-1); }) -(define_insn_and_split "*clzhi2" - [(set (match_operand:SI 0 "register_operand") - (clz:SI - (zero_extend:SI (match_operand:HI 1 "nonimmediate_operand")))) - (clobber (reg:CC FLAGS_REG))] - "TARGET_LZCNT - && can_create_pseudo_p ()" - "#" - "&& 1" - [(const_int 0)] -{ - rtx tmp = gen_reg_rtx (HImode); - - emit_insn (gen_lzcnt_hi (tmp, operands[1])); - emit_insn (gen_zero_extendhisi2 (operands[0], tmp)); - DONE; -}) - (define_insn_and_split "clz2_lzcnt" [(set (match_operand:SWI48 0 "register_operand" "=r") (clz:SWI48 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 1a3a4bbddbb..47081122b47 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2017-06-08 Uros Bizjak + + PR target/81015 + * gcc.target/i386/pr59874-1.c (foo): Call __builtin_ctzs. + * gcc.target/i386/pr59874-2.c (foo): Call __builtin_clzs. + * gcc.target/i386/pr81015.c: New test. + 2017-06-08 Tom de Vries * gcc.c-torture/compile/930506-2.c: Use dg-require-effective-target @@ -488,8 +495,8 @@ 2017-05-31 Steven Munroe * gcc.target/powerpc/bmi2-pdep32-1.c: Add -mcpu=power7 to - dg-options. Change dg-require-effective-target powerpc_vsx_ok - to vsx_hw. Add dg-skip-if directive to disable this test if + dg-options. Change dg-require-effective-target powerpc_vsx_ok + to vsx_hw. Add dg-skip-if directive to disable this test if -mcpu overridden. * gcc.target/powerpc/bmi2-pdep64-1.c: Likewise. * gcc.target/powerpc/bmi2-pext32-1.c: Likewise. diff --git a/gcc/testsuite/gcc.target/i386/pr59874-1.c b/gcc/testsuite/gcc.target/i386/pr59874-1.c index e6a8a06dd52..862cba43757 100644 --- a/gcc/testsuite/gcc.target/i386/pr59874-1.c +++ b/gcc/testsuite/gcc.target/i386/pr59874-1.c @@ -6,5 +6,5 @@ unsigned int foo (unsigned short x) { - return x ? __builtin_ctz (x) : 16U; + return x ? __builtin_ctzs (x) : 16U; } diff --git a/gcc/testsuite/gcc.target/i386/pr59874-2.c b/gcc/testsuite/gcc.target/i386/pr59874-2.c index 710aa7a482c..3b7679ff9f5 100644 --- a/gcc/testsuite/gcc.target/i386/pr59874-2.c +++ b/gcc/testsuite/gcc.target/i386/pr59874-2.c @@ -6,5 +6,5 @@ unsigned int foo (unsigned short x) { - return x ? __builtin_clz (x) : 16U; + return x ? __builtin_clzs (x) : 16U; } diff --git a/gcc/testsuite/gcc.target/i386/pr81015.c b/gcc/testsuite/gcc.target/i386/pr81015.c new file mode 100644 index 00000000000..92e53f1989f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr81015.c @@ -0,0 +1,21 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mlzcnt" } */ +/* { dg-require-effective-target lzcnt } */ + +#include "lzcnt-check.h" + +int +__attribute__ ((noinline, noclone)) +foo (unsigned short a) +{ + return __builtin_clz (a); +} + +static void +lzcnt_test () +{ + int res = foo (1); + + if (res != 31) + abort (); +} -- 2.30.2