From 21b90708a4ca0c2ea162dd143ef0c4156e8fb718 Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Wed, 26 Aug 2020 10:44:44 -0700 Subject: [PATCH] freedreno/batch: replace lrz_clear with prologue Replace lrz_clear with the more general purpose prologue rb. While the epilogue is per-tile (in gmem mode), the prologue is per-batch, so also add some comments to make that point more clear. Signed-off-by: Rob Clark Part-of: --- src/gallium/drivers/freedreno/a5xx/fd5_draw.c | 12 +---------- src/gallium/drivers/freedreno/a5xx/fd5_gmem.c | 7 +++++-- src/gallium/drivers/freedreno/a6xx/fd6_draw.c | 7 +------ src/gallium/drivers/freedreno/a6xx/fd6_gmem.c | 20 ++++++++++--------- .../drivers/freedreno/freedreno_batch.c | 15 +++++++++++--- .../drivers/freedreno/freedreno_batch.h | 9 ++++++--- 6 files changed, 36 insertions(+), 34 deletions(-) diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_draw.c b/src/gallium/drivers/freedreno/a5xx/fd5_draw.c index 05fdaf78b51..0d7514de6e8 100644 --- a/src/gallium/drivers/freedreno/a5xx/fd5_draw.c +++ b/src/gallium/drivers/freedreno/a5xx/fd5_draw.c @@ -190,17 +190,7 @@ fd5_clear_lrz(struct fd_batch *batch, struct fd_resource *zsbuf, double depth) struct fd_ringbuffer *ring; uint32_t clear = util_pack_z(PIPE_FORMAT_Z16_UNORM, depth); - // TODO mid-frame clears (ie. app doing crazy stuff)?? Maybe worth - // splitting both clear and lrz clear out into their own rb's. And - // just throw away any draws prior to clear. (Anything not fullscreen - // clear, just fallback to generic path that treats it as a normal - // draw - - if (!batch->lrz_clear) { - batch->lrz_clear = fd_submit_new_ringbuffer(batch->submit, 0x1000, 0); - } - - ring = batch->lrz_clear; + ring = fd_batch_get_prologue(batch); OUT_WFI5(ring); diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c index 61bc443c724..b574bcd880d 100644 --- a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c +++ b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c @@ -369,8 +369,8 @@ fd5_emit_tile_init(struct fd_batch *batch) fd5_emit_restore(batch, ring); - if (batch->lrz_clear) - fd5_emit_ib(ring, batch->lrz_clear); + if (batch->prologue) + fd5_emit_ib(ring, batch->prologue); fd5_emit_lrz_flush(ring); @@ -700,6 +700,9 @@ fd5_emit_sysmem_prep(struct fd_batch *batch) fd5_emit_lrz_flush(ring); + if (batch->prologue) + fd5_emit_ib(ring, batch->prologue); + OUT_PKT7(ring, CP_SKIP_IB2_ENABLE_GLOBAL, 1); OUT_RING(ring, 0x0); diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c index e95c400dd38..3e9ec98d5fc 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c @@ -345,12 +345,7 @@ fd6_clear_lrz(struct fd_batch *batch, struct fd_resource *zsbuf, double depth) struct fd_ringbuffer *ring; struct fd6_context *fd6_ctx = fd6_context(batch->ctx); - if (batch->lrz_clear) { - fd_ringbuffer_del(batch->lrz_clear); - } - - batch->lrz_clear = fd_submit_new_ringbuffer(batch->submit, 0x1000, 0); - ring = batch->lrz_clear; + ring = fd_batch_get_prologue(batch); emit_marker6(ring, 7); OUT_PKT7(ring, CP_SET_MARKER, 1); diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c index eb4cbbf52df..32ea772a5bc 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c @@ -677,10 +677,10 @@ fd6_emit_tile_init(struct fd_batch *batch) fd6_emit_lrz_flush(ring); - if (batch->lrz_clear) { - fd_log(batch, "START LRZ CLEAR"); - fd6_emit_ib(ring, batch->lrz_clear); - fd_log(batch, "END LRZ CLEAR"); + if (batch->prologue) { + fd_log(batch, "START PROLOGUE"); + fd6_emit_ib(ring, batch->prologue); + fd_log(batch, "END PROLOGUE"); } fd6_cache_inv(batch, ring); @@ -1364,6 +1364,13 @@ fd6_emit_sysmem_prep(struct fd_batch *batch) struct fd_ringbuffer *ring = batch->gmem; fd6_emit_restore(batch, ring); + fd6_emit_lrz_flush(ring); + + if (batch->prologue) { + fd_log(batch, "START PROLOGUE"); + fd6_emit_ib(ring, batch->prologue); + fd_log(batch, "END PROLOGUE"); + } if (pfb->width > 0 && pfb->height > 0) set_scissor(ring, 0, 0, pfb->width - 1, pfb->height - 1); @@ -1376,11 +1383,6 @@ fd6_emit_sysmem_prep(struct fd_batch *batch) emit_sysmem_clears(batch, ring); - fd6_emit_lrz_flush(ring); - - if (batch->lrz_clear) - fd6_emit_ib(ring, batch->lrz_clear); - emit_marker6(ring, 7); OUT_PKT7(ring, CP_SET_MARKER, 1); OUT_RING(ring, A6XX_CP_SET_MARKER_0_MODE(RM6_BYPASS)); diff --git a/src/gallium/drivers/freedreno/freedreno_batch.c b/src/gallium/drivers/freedreno/freedreno_batch.c index 86e8b5b7834..1a93a8272c9 100644 --- a/src/gallium/drivers/freedreno/freedreno_batch.c +++ b/src/gallium/drivers/freedreno/freedreno_batch.c @@ -164,9 +164,9 @@ batch_fini(struct fd_batch *batch) debug_assert(!batch->gmem); } - if (batch->lrz_clear) { - fd_ringbuffer_del(batch->lrz_clear); - batch->lrz_clear = NULL; + if (batch->prologue) { + fd_ringbuffer_del(batch->prologue); + batch->prologue = NULL; } if (batch->epilogue) { @@ -336,6 +336,15 @@ batch_flush(struct fd_batch *batch) fd_screen_unlock(batch->ctx->screen); } +/* Get per-batch prologue */ +struct fd_ringbuffer * +fd_batch_get_prologue(struct fd_batch *batch) +{ + if (!batch->prologue) + batch->prologue = alloc_ring(batch, 0x1000, 0); + return batch->prologue; +} + /* NOTE: could drop the last ref to batch * * @sync: synchronize with flush_queue, ensures batch is *actually* flushed diff --git a/src/gallium/drivers/freedreno/freedreno_batch.h b/src/gallium/drivers/freedreno/freedreno_batch.h index b7b970359a3..1e33654b04d 100644 --- a/src/gallium/drivers/freedreno/freedreno_batch.h +++ b/src/gallium/drivers/freedreno/freedreno_batch.h @@ -190,11 +190,12 @@ struct fd_batch { /** tiling/gmem (IB0) cmdstream: */ struct fd_ringbuffer *gmem; - /** epilogue cmdstream: */ + /** preemble cmdstream (executed once before first tile): */ + struct fd_ringbuffer *prologue; + + /** epilogue cmdstream (executed after each tile): */ struct fd_ringbuffer *epilogue; - // TODO maybe more generically split out clear and clear_binning rings? - struct fd_ringbuffer *lrz_clear; struct fd_ringbuffer *tile_setup; struct fd_ringbuffer *tile_fini; @@ -345,6 +346,7 @@ fd_event_write(struct fd_batch *batch, struct fd_ringbuffer *ring, fd_reset_wfi(batch); } +/* Get per-tile epilogue */ static inline struct fd_ringbuffer * fd_batch_get_epilogue(struct fd_batch *batch) { @@ -354,5 +356,6 @@ fd_batch_get_epilogue(struct fd_batch *batch) return batch->epilogue; } +struct fd_ringbuffer * fd_batch_get_prologue(struct fd_batch *batch); #endif /* FREEDRENO_BATCH_H_ */ -- 2.30.2