From 21c656bc47e8f042e4eee52c285baa0e778fd07c Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Sun, 3 May 2015 14:37:49 +0200 Subject: [PATCH] libfreeimage: add patch to fix x86 build problem Add a patch to fix an x86 build problem caused by invalid register usage when -fPIC is used. Fixes: http://autobuild.buildroot.org/results/fe7/fe72243a84a91b68ef3138847294674b36f16c58/ Signed-off-by: Thomas Petazzoni Signed-off-by: Peter Korsgaard --- package/libfreeimage/0002-fix-cpuid-x86.patch | 67 +++++++++++++++++++ 1 file changed, 67 insertions(+) create mode 100644 package/libfreeimage/0002-fix-cpuid-x86.patch diff --git a/package/libfreeimage/0002-fix-cpuid-x86.patch b/package/libfreeimage/0002-fix-cpuid-x86.patch new file mode 100644 index 0000000000..98b0e9c6e3 --- /dev/null +++ b/package/libfreeimage/0002-fix-cpuid-x86.patch @@ -0,0 +1,67 @@ +Fix build issue caused by invalid register usage on x86 + +Patch taken from https://github.com/openexr/openexr/issues/128. + +Signed-off-by: Thomas Petazzoni + +Index: b/Source/OpenEXR/IlmImf/ImfSystemSpecific.cpp +=================================================================== +--- a/Source/OpenEXR/IlmImf/ImfSystemSpecific.cpp ++++ b/Source/OpenEXR/IlmImf/ImfSystemSpecific.cpp +@@ -40,21 +40,19 @@ + + namespace { + #if defined(IMF_HAVE_SSE2) && defined(__GNUC__) +- ++#include + // Helper functions for gcc + SSE enabled +- void cpuid(int n, int &eax, int &ebx, int &ecx, int &edx) ++ void cpuid(unsigned int n, unsigned int &eax, unsigned int &ebx, ++ unsigned int &ecx, unsigned int &edx) + { +- __asm__ __volatile__ ( +- "cpuid" +- : /* Output */ "=a"(eax), "=b"(ebx), "=c"(ecx), "=d"(edx) +- : /* Input */ "a"(n) +- : /* Clobber */); ++ __get_cpuid(n, &eax, &ebx, &ecx, &edx); + } + + #else // IMF_HAVE_SSE2 && __GNUC__ + + // Helper functions for generic compiler - all disabled +- void cpuid(int n, int &eax, int &ebx, int &ecx, int &edx) ++ void cpuid(unsigned int n, unsigned int &eax, unsigned int &ebx, ++ unsigned int &ecx, unsigned int &edx) + { + eax = ebx = ecx = edx = 0; + } +@@ -64,7 +62,7 @@ + + #ifdef OPENEXR_IMF_HAVE_GCC_INLINE_ASM_AVX + +- void xgetbv(int n, int &eax, int &edx) ++ void xgetbv(unsigned int n, unsigned int &eax, unsigned int &edx) + { + __asm__ __volatile__ ( + "xgetbv" +@@ -75,7 +73,7 @@ + + #else // OPENEXR_IMF_HAVE_GCC_INLINE_ASM_AVX + +- void xgetbv(int n, int &eax, int &edx) ++ void xgetbv(unsigned int n, unsigned int &eax, unsigned int &edx) + { + eax = edx = 0; + } +@@ -94,8 +92,8 @@ + f16c(false) + { + bool osxsave = false; +- int max = 0; +- int eax, ebx, ecx, edx; ++ unsigned int max = 0; ++ unsigned int eax, ebx, ecx, edx; + + cpuid(0, max, ebx, ecx, edx); + if (max > 0) -- 2.30.2