From 22363faf2502c1e87736cb3ecc9332f388b71d4a Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 13 Jul 2020 14:21:44 +0100 Subject: [PATCH] add EXTSWSLI "pass" to formal shift_rot proof --- src/soc/fu/shift_rot/formal/proof_main_stage.py | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/soc/fu/shift_rot/formal/proof_main_stage.py b/src/soc/fu/shift_rot/formal/proof_main_stage.py index 685b221f..6346950d 100644 --- a/src/soc/fu/shift_rot/formal/proof_main_stage.py +++ b/src/soc/fu/shift_rot/formal/proof_main_stage.py @@ -103,6 +103,8 @@ class Driver(Elaboratable): pass with m.Case(MicrOp.OP_RLCL): pass + with m.Case(MicrOp.OP_EXTSWSLI): + pass with m.Default(): comb += o_ok.eq(0) -- 2.30.2