From 22430224fec31591432d4a3e65c6f457ba1c1653 Mon Sep 17 00:00:00 2001 From: Timothy Arceri Date: Fri, 23 Feb 2018 17:00:01 +1100 Subject: [PATCH] radeonsi/nir: enable lowering of fpow MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Lowering fpow in NIR rather than LLVM can be beneficial. Polaris results: Totals from affected shaders: SGPRS: 124928 -> 124896 (-0.03 %) VGPRS: 68616 -> 68332 (-0.41 %) Spilled SGPRs: 394 -> 413 (4.82 %) Spilled VGPRs: 0 -> 0 (0.00 %) Private memory VGPRs: 0 -> 0 (0.00 %) Scratch size: 0 -> 0 (0.00 %) dwords per thread Code Size: 3668912 -> 3658368 (-0.29 %) bytes LDS: 0 -> 0 (0.00 %) blocks Max Waves: 18575 -> 18593 (0.10 %) Wait states: 0 -> 0 (0.00 %) Fixes: d6b753920677 "ac/nir: remove emission of nir_op_fpow" Tested-by: Dieter Nützel Reviewed-by: Samuel Pitoiset Reviewed-by: Marek Olšák --- src/gallium/drivers/radeonsi/si_get.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c index 19426334fb6..998ef8d268b 100644 --- a/src/gallium/drivers/radeonsi/si_get.c +++ b/src/gallium/drivers/radeonsi/si_get.c @@ -496,6 +496,7 @@ static const struct nir_shader_compiler_options nir_options = { .lower_scmp = true, .lower_flrp32 = true, .lower_flrp64 = true, + .lower_fpow = true, .lower_fsat = true, .lower_fdiv = true, .lower_sub = true, -- 2.30.2