From 2244a7a20460b401bb989107c6f721632ce21b5f Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 24 May 2021 11:50:27 +0100 Subject: [PATCH] add extra (dummy) mul operation, 0*0 --- src/openpower/decoder/isa/test_caller_fp.py | 1 + 1 file changed, 1 insertion(+) diff --git a/src/openpower/decoder/isa/test_caller_fp.py b/src/openpower/decoder/isa/test_caller_fp.py index 99d75192..3d8fdfa9 100644 --- a/src/openpower/decoder/isa/test_caller_fp.py +++ b/src/openpower/decoder/isa/test_caller_fp.py @@ -183,6 +183,7 @@ class DecoderTestCase(FHDLTestCase): ] """ lst = ["fmuls 3, 1, 2", # 7.0 * -9.8 = -68.6 + "fmuls 29,12,8", # test ] fprs = [0] * 32 -- 2.30.2