From 224b491b09a88cff2f91b15b763fb785114655af Mon Sep 17 00:00:00 2001 From: Nathan Sidwell Date: Tue, 23 Jun 2015 13:05:15 +0000 Subject: [PATCH] nvptx.md (sel_true, [...]): New conditional selects. * config/nvptx/nvptx.md (sel_true, sel_false): New conditional selects. (setcc_int, setcc_float): Reformat. From-SVN: r224839 --- gcc/ChangeLog | 6 +++++ gcc/config/nvptx/nvptx.md | 52 +++++++++++++++++++++++++++++++++------ 2 files changed, 50 insertions(+), 8 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 80c07c82efd..f7d60f53060 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2015-06-23 Nathan Sidwell + + * config/nvptx/nvptx.md (sel_true, sel_false): New + conditional selects. + (setcc_int, setcc_float): Reformat. + 2015-06-23 Marek Polacek * match.pd ((x + y) - (x | y) -> x & y, diff --git a/gcc/config/nvptx/nvptx.md b/gcc/config/nvptx/nvptx.md index a49786cb00b..a4df53b91e7 100644 --- a/gcc/config/nvptx/nvptx.md +++ b/gcc/config/nvptx/nvptx.md @@ -869,35 +869,71 @@ "" "%.\\tselp%t0 %0,-1,0,%1;") +(define_insn "sel_true" + [(set (match_operand:HSDIM 0 "nvptx_register_operand" "=R") + (if_then_else:HSDIM + (ne (match_operand:BI 1 "nvptx_register_operand" "R") (const_int 0)) + (match_operand:HSDIM 2 "nvptx_nonmemory_operand" "Ri") + (match_operand:HSDIM 3 "nvptx_nonmemory_operand" "Ri")))] + "" + "%.\\tselp%t0\\t%0, %2, %3, %1;") + +(define_insn "sel_true" + [(set (match_operand:SDFM 0 "nvptx_register_operand" "=R") + (if_then_else:SDFM + (ne (match_operand:BI 1 "nvptx_register_operand" "R") (const_int 0)) + (match_operand:SDFM 2 "nvptx_nonmemory_operand" "RF") + (match_operand:SDFM 3 "nvptx_nonmemory_operand" "RF")))] + "" + "%.\\tselp%t0\\t%0, %2, %3, %1;") + +(define_insn "sel_false" + [(set (match_operand:HSDIM 0 "nvptx_register_operand" "=R") + (if_then_else:HSDIM + (eq (match_operand:BI 1 "nvptx_register_operand" "R") (const_int 0)) + (match_operand:HSDIM 2 "nvptx_nonmemory_operand" "Ri") + (match_operand:HSDIM 3 "nvptx_nonmemory_operand" "Ri")))] + "" + "%.\\tselp%t0\\t%0, %3, %2, %1;") + +(define_insn "sel_false" + [(set (match_operand:SDFM 0 "nvptx_register_operand" "=R") + (if_then_else:SDFM + (eq (match_operand:BI 1 "nvptx_register_operand" "R") (const_int 0)) + (match_operand:SDFM 2 "nvptx_nonmemory_operand" "RF") + (match_operand:SDFM 3 "nvptx_nonmemory_operand" "RF")))] + "" + "%.\\tselp%t0\\t%0, %3, %2, %1;") + (define_insn "setcc_int" [(set (match_operand:SI 0 "nvptx_register_operand" "=R") (match_operator:SI 1 "nvptx_comparison_operator" - [(match_operand:HSDIM 2 "nvptx_register_operand" "R") - (match_operand:HSDIM 3 "nvptx_nonmemory_operand" "Ri")]))] + [(match_operand:HSDIM 2 "nvptx_register_operand" "R") + (match_operand:HSDIM 3 "nvptx_nonmemory_operand" "Ri")]))] "" "%.\\tset%t0%c1 %0,%2,%3;") (define_insn "setcc_int" [(set (match_operand:SI 0 "nvptx_register_operand" "=R") (match_operator:SI 1 "nvptx_float_comparison_operator" - [(match_operand:SDFM 2 "nvptx_register_operand" "R") - (match_operand:SDFM 3 "nvptx_nonmemory_operand" "RF")]))] + [(match_operand:SDFM 2 "nvptx_register_operand" "R") + (match_operand:SDFM 3 "nvptx_nonmemory_operand" "RF")]))] "" "%.\\tset%t0%c1 %0,%2,%3;") (define_insn "setcc_float" [(set (match_operand:SF 0 "nvptx_register_operand" "=R") (match_operator:SF 1 "nvptx_comparison_operator" - [(match_operand:HSDIM 2 "nvptx_register_operand" "R") - (match_operand:HSDIM 3 "nvptx_nonmemory_operand" "Ri")]))] + [(match_operand:HSDIM 2 "nvptx_register_operand" "R") + (match_operand:HSDIM 3 "nvptx_nonmemory_operand" "Ri")]))] "" "%.\\tset%t0%c1 %0,%2,%3;") (define_insn "setcc_float" [(set (match_operand:SF 0 "nvptx_register_operand" "=R") (match_operator:SF 1 "nvptx_float_comparison_operator" - [(match_operand:SDFM 2 "nvptx_register_operand" "R") - (match_operand:SDFM 3 "nvptx_nonmemory_operand" "RF")]))] + [(match_operand:SDFM 2 "nvptx_register_operand" "R") + (match_operand:SDFM 3 "nvptx_nonmemory_operand" "RF")]))] "" "%.\\tset%t0%c1 %0,%2,%3;") -- 2.30.2