From 224cf2906a8f38ce47411afc93a223ac0e41795f Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Mon, 17 Apr 2017 13:01:52 +1000 Subject: [PATCH] radv/ac: add initial pre-pass for shader info gathering There is some radv specific info we need to gather from shaders before we get into converting nir->llvm, so we can make better decisions especially around user sgpr allocation. This is just an initial placeholder to gather if sample positions are required in the frag shader. Reviewed-by: Bas Nieuwenhuizen Signed-off-by: Dave Airlie --- src/amd/Makefile.sources | 2 ++ src/amd/common/ac_nir_to_llvm.c | 16 +++++---- src/amd/common/ac_nir_to_llvm.h | 4 +-- src/amd/common/ac_shader_info.c | 61 ++++++++++++++++++++++++++++++++ src/amd/common/ac_shader_info.h | 40 +++++++++++++++++++++ src/amd/vulkan/radv_cmd_buffer.c | 2 +- 6 files changed, 116 insertions(+), 9 deletions(-) create mode 100644 src/amd/common/ac_shader_info.c create mode 100644 src/amd/common/ac_shader_info.h diff --git a/src/amd/Makefile.sources b/src/amd/Makefile.sources index 816e7e4c993..38dd48b8d3c 100644 --- a/src/amd/Makefile.sources +++ b/src/amd/Makefile.sources @@ -45,6 +45,8 @@ AMD_COMPILER_FILES = \ common/ac_llvm_build.c \ common/ac_llvm_build.h \ common/ac_llvm_helper.cpp \ + common/ac_shader_info.c \ + common/ac_shader_info.h \ common/ac_llvm_util.c \ common/ac_llvm_util.h diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 9bcd5f6db46..dbb3b67b511 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -30,7 +30,7 @@ #include "../vulkan/radv_descriptor_set.h" #include "util/bitscan.h" #include - +#include "ac_shader_info.h" enum radeon_llvm_calling_convention { RADEON_LLVM_AMDGPU_VS = 87, RADEON_LLVM_AMDGPU_GS = 88, @@ -680,7 +680,8 @@ static void create_function(struct nir_to_llvm_context *ctx) arg_types[arg_idx++] = ctx->i32; // GS instance id break; case MESA_SHADER_FRAGMENT: - arg_types[arg_idx++] = ctx->i32; /* sample position offset */ + if (ctx->shader_info->info.ps.needs_sample_positions) + arg_types[arg_idx++] = ctx->i32; /* sample position offset */ user_sgpr_count = arg_idx; arg_types[arg_idx++] = ctx->i32; /* prim mask */ sgpr_count = arg_idx; @@ -845,9 +846,11 @@ static void create_function(struct nir_to_llvm_context *ctx) ctx->gs_invocation_id = LLVMGetParam(ctx->main_function, arg_idx++); break; case MESA_SHADER_FRAGMENT: - set_userdata_location_shader(ctx, AC_UD_PS_SAMPLE_POS_OFFSET, user_sgpr_idx, 1); - user_sgpr_idx += 1; - ctx->sample_pos_offset = LLVMGetParam(ctx->main_function, arg_idx++); + if (ctx->shader_info->info.ps.needs_sample_positions) { + set_userdata_location_shader(ctx, AC_UD_PS_SAMPLE_POS_OFFSET, user_sgpr_idx, 1); + user_sgpr_idx += 1; + ctx->sample_pos_offset = LLVMGetParam(ctx->main_function, arg_idx++); + } ctx->prim_mask = LLVMGetParam(ctx->main_function, arg_idx++); ctx->persp_sample = LLVMGetParam(ctx->main_function, arg_idx++); ctx->persp_center = LLVMGetParam(ctx->main_function, arg_idx++); @@ -3528,7 +3531,6 @@ static LLVMValueRef load_sample_position(struct nir_to_llvm_context *ctx, sample_id = LLVMBuildAdd(ctx->builder, sample_id, ctx->sample_pos_offset, ""); result = ac_build_indexed_load(&ctx->ac, ptr, sample_id, false); - ctx->shader_info->fs.uses_sample_positions = true; return result; } @@ -5703,6 +5705,8 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm, memset(shader_info, 0, sizeof(*shader_info)); + ac_nir_shader_info_pass(nir, options, &shader_info->info); + LLVMSetTarget(ctx.module, options->supports_spill ? "amdgcn-mesa-mesa3d" : "amdgcn--"); LLVMTargetDataRef data_layout = LLVMCreateTargetDataLayout(tm); diff --git a/src/amd/common/ac_nir_to_llvm.h b/src/amd/common/ac_nir_to_llvm.h index 3d0b456f9f5..7a4065ac5fa 100644 --- a/src/amd/common/ac_nir_to_llvm.h +++ b/src/amd/common/ac_nir_to_llvm.h @@ -29,7 +29,7 @@ #include "llvm-c/TargetMachine.h" #include "amd_family.h" #include "../vulkan/radv_descriptor_set.h" - +#include "ac_shader_info.h" #include "shader_enums.h" struct ac_shader_binary; struct ac_shader_config; @@ -138,6 +138,7 @@ struct ac_es_output_info { struct ac_shader_variant_info { struct ac_userdata_locations user_sgprs_locs; + struct ac_shader_info info; unsigned num_user_sgprs; unsigned num_input_sgprs; unsigned num_input_vgprs; @@ -166,7 +167,6 @@ struct ac_shader_variant_info { bool force_persample; bool prim_id_input; bool layer_input; - bool uses_sample_positions; } fs; struct { unsigned block_size[3]; diff --git a/src/amd/common/ac_shader_info.c b/src/amd/common/ac_shader_info.c new file mode 100644 index 00000000000..85252fea146 --- /dev/null +++ b/src/amd/common/ac_shader_info.c @@ -0,0 +1,61 @@ +/* + * Copyright © 2017 Red Hat + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ +#include "nir.h" +#include "ac_shader_info.h" +#include "ac_nir_to_llvm.h" +static void +gather_intrinsic_info(nir_intrinsic_instr *instr, struct ac_shader_info *info) +{ + switch (instr->intrinsic) { + case nir_intrinsic_interp_var_at_sample: + info->ps.needs_sample_positions = true; + break; + default: + break; + } +} + +static void +gather_info_block(nir_block *block, struct ac_shader_info *info) +{ + nir_foreach_instr(instr, block) { + switch (instr->type) { + case nir_instr_type_intrinsic: + gather_intrinsic_info(nir_instr_as_intrinsic(instr), info); + break; + default: + break; + } + } +} + +void +ac_nir_shader_info_pass(struct nir_shader *nir, + const struct ac_nir_compiler_options *options, + struct ac_shader_info *info) +{ + struct nir_function *func = (struct nir_function *)exec_list_get_head(&nir->functions); + nir_foreach_block(block, func->impl) { + gather_info_block(block, info); + } +} diff --git a/src/amd/common/ac_shader_info.h b/src/amd/common/ac_shader_info.h new file mode 100644 index 00000000000..5576c3b4bac --- /dev/null +++ b/src/amd/common/ac_shader_info.h @@ -0,0 +1,40 @@ +/* + * Copyright © 2017 Red Hat + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ +#ifndef AC_SHADER_INFO_H +#define AC_SHADER_INFO_H +struct nir_shader; +struct ac_nir_compiler_options; + +/* a NIR pass to gather all the info needed to optimise the alloction patterns for the RADV user sgprs */ + +struct ac_shader_info { + struct { + bool needs_sample_positions; + } ps; +}; + +void +ac_nir_shader_info_pass(struct nir_shader *nir, + const struct ac_nir_compiler_options *options, + struct ac_shader_info *info); +#endif diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 31d04e535dc..f3e5f829241 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -454,7 +454,7 @@ radv_update_multisample_state(struct radv_cmd_buffer *cmd_buffer, radv_cayman_emit_msaa_sample_locs(cmd_buffer->cs, num_samples); - if (pipeline->shaders[MESA_SHADER_FRAGMENT]->info.fs.uses_sample_positions) { + if (pipeline->shaders[MESA_SHADER_FRAGMENT]->info.info.ps.needs_sample_positions) { uint32_t offset; struct ac_userdata_info *loc = radv_lookup_user_sgpr(pipeline, MESA_SHADER_FRAGMENT, AC_UD_PS_SAMPLE_POS_OFFSET); uint32_t base_reg = shader_stage_to_user_data_0(MESA_SHADER_FRAGMENT, radv_pipeline_has_gs(pipeline), radv_pipeline_has_tess(pipeline)); -- 2.30.2