From 2290535d62ad194ab28c2b1cbd5928ab17b58766 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Nicolai=20H=C3=A4hnle?= Date: Thu, 30 Mar 2017 09:24:24 +0200 Subject: [PATCH] radeonsi: emit TGSI_OPCODE_CLOCK MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Reviewed-by: Samuel Pitoiset Reviewed-by: Marek Olšák --- src/gallium/drivers/radeonsi/si_shader.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 580781bd4cb..ec063ad9028 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -3157,6 +3157,25 @@ static void membar_emit( emit_waitcnt(ctx, waitcnt); } +static void clock_emit( + const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + struct si_shader_context *ctx = si_shader_context(bld_base); + struct gallivm_state *gallivm = &ctx->gallivm; + LLVMValueRef tmp; + + tmp = lp_build_intrinsic(gallivm->builder, "llvm.readcyclecounter", + ctx->i64, NULL, 0, 0); + tmp = LLVMBuildBitCast(gallivm->builder, tmp, ctx->v2i32, ""); + + emit_data->output[0] = + LLVMBuildExtractElement(gallivm->builder, tmp, ctx->i32_0, ""); + emit_data->output[1] = + LLVMBuildExtractElement(gallivm->builder, tmp, ctx->i32_1, ""); +} + static LLVMValueRef shader_buffer_fetch_rsrc(struct si_shader_context *ctx, const struct tgsi_full_src_register *reg) @@ -6548,6 +6567,8 @@ static void si_init_shader_ctx(struct si_shader_context *ctx, bld_base->op_actions[TGSI_OPCODE_MEMBAR].emit = membar_emit; + bld_base->op_actions[TGSI_OPCODE_CLOCK].emit = clock_emit; + bld_base->op_actions[TGSI_OPCODE_DDX].emit = si_llvm_emit_ddxy; bld_base->op_actions[TGSI_OPCODE_DDY].emit = si_llvm_emit_ddxy; bld_base->op_actions[TGSI_OPCODE_DDX_FINE].emit = si_llvm_emit_ddxy; -- 2.30.2