From 22f89c92c75d45824266c0b226b44fc76f1591c5 Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Mon, 9 May 2016 22:09:29 +0200 Subject: [PATCH] i386.md (set_got, [...]): Remove constraints from expanders. * config/i386/i386.md (set_got, set_got_labelled, lwp_llwpcb, lwp_lwpval3, lwp_lwpins3): Remove constraints from expanders. * config/i386/sse.md (vec_interleave_high, vec_interleave_low, _vpermi2var3_maskz, _vpermt2var3_maskz): Likewise. From-SVN: r236045 --- gcc/ChangeLog | 9 ++++++ gcc/config/i386/i386.md | 22 +++++++-------- gcc/config/i386/sse.md | 62 ++++++++++++++++++++--------------------- 3 files changed, 51 insertions(+), 42 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0cd95344f1b..42152ef20c4 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2016-05-09 Jakub Jelinek + + * config/i386/i386.md (set_got, set_got_labelled, lwp_llwpcb, + lwp_lwpval3, lwp_lwpins3): Remove constraints from + expanders. + * config/i386/sse.md (vec_interleave_high, + vec_interleave_low, _vpermi2var3_maskz, + _vpermt2var3_maskz): Likewise. + 2016-05-04 Aaron Sawdey * config/rs6000/rs6000.c (rs6000_reassociation_width): Add diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 9b5407aa697..9bd19ab04be 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -12505,7 +12505,7 @@ (define_expand "set_got" [(parallel - [(set (match_operand:SI 0 "register_operand" "=r") + [(set (match_operand:SI 0 "register_operand") (unspec:SI [(const_int 0)] UNSPEC_SET_GOT)) (clobber (reg:CC FLAGS_REG))])] "!TARGET_64BIT" @@ -12525,7 +12525,7 @@ (define_expand "set_got_labelled" [(parallel - [(set (match_operand:SI 0 "register_operand" "=r") + [(set (match_operand:SI 0 "register_operand") (unspec:SI [(label_ref (match_operand 1))] UNSPEC_SET_GOT)) (clobber (reg:CC FLAGS_REG))])] @@ -19024,7 +19024,7 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; (define_expand "lwp_llwpcb" - [(unspec_volatile [(match_operand 0 "register_operand" "r")] + [(unspec_volatile [(match_operand 0 "register_operand")] UNSPECV_LLWP_INTRINSIC)] "TARGET_LWP") @@ -19038,7 +19038,7 @@ (set_attr "length" "5")]) (define_expand "lwp_slwpcb" - [(set (match_operand 0 "register_operand" "=r") + [(set (match_operand 0 "register_operand") (unspec_volatile [(const_int 0)] UNSPECV_SLWP_INTRINSIC))] "TARGET_LWP" { @@ -19062,9 +19062,9 @@ (set_attr "length" "5")]) (define_expand "lwp_lwpval3" - [(unspec_volatile [(match_operand:SWI48 1 "register_operand" "r") - (match_operand:SI 2 "nonimmediate_operand" "rm") - (match_operand:SI 3 "const_int_operand" "i")] + [(unspec_volatile [(match_operand:SWI48 1 "register_operand") + (match_operand:SI 2 "nonimmediate_operand") + (match_operand:SI 3 "const_int_operand")] UNSPECV_LWPVAL_INTRINSIC)] "TARGET_LWP" ;; Avoid unused variable warning. @@ -19084,11 +19084,11 @@ (define_expand "lwp_lwpins3" [(set (reg:CCC FLAGS_REG) - (unspec_volatile:CCC [(match_operand:SWI48 1 "register_operand" "r") - (match_operand:SI 2 "nonimmediate_operand" "rm") - (match_operand:SI 3 "const_int_operand" "i")] + (unspec_volatile:CCC [(match_operand:SWI48 1 "register_operand") + (match_operand:SI 2 "nonimmediate_operand") + (match_operand:SI 3 "const_int_operand")] UNSPECV_LWPINS_INTRINSIC)) - (set (match_operand:QI 0 "nonimmediate_operand" "=qm") + (set (match_operand:QI 0 "nonimmediate_operand") (eq:QI (reg:CCC FLAGS_REG) (const_int 0)))] "TARGET_LWP") diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 411f78e0ede..e993f9cdc3a 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -11899,9 +11899,9 @@ (set_attr "mode" "TI")]) (define_expand "vec_interleave_high" - [(match_operand:VI_256 0 "register_operand" "=x") - (match_operand:VI_256 1 "register_operand" "x") - (match_operand:VI_256 2 "nonimmediate_operand" "xm")] + [(match_operand:VI_256 0 "register_operand") + (match_operand:VI_256 1 "register_operand") + (match_operand:VI_256 2 "nonimmediate_operand")] "TARGET_AVX2" { rtx t1 = gen_reg_rtx (mode); @@ -11917,9 +11917,9 @@ }) (define_expand "vec_interleave_low" - [(match_operand:VI_256 0 "register_operand" "=x") - (match_operand:VI_256 1 "register_operand" "x") - (match_operand:VI_256 2 "nonimmediate_operand" "xm")] + [(match_operand:VI_256 0 "register_operand") + (match_operand:VI_256 1 "register_operand") + (match_operand:VI_256 2 "nonimmediate_operand")] "TARGET_AVX2" { rtx t1 = gen_reg_rtx (mode); @@ -17244,11 +17244,11 @@ (set_attr "mode" "")]) (define_expand "_vpermi2var3_maskz" - [(match_operand:VI48F 0 "register_operand" "=v") - (match_operand:VI48F 1 "register_operand" "v") - (match_operand: 2 "register_operand" "0") - (match_operand:VI48F 3 "nonimmediate_operand" "vm") - (match_operand: 4 "register_operand" "Yk")] + [(match_operand:VI48F 0 "register_operand") + (match_operand:VI48F 1 "register_operand") + (match_operand: 2 "register_operand") + (match_operand:VI48F 3 "nonimmediate_operand") + (match_operand: 4 "register_operand")] "TARGET_AVX512F" { emit_insn (gen__vpermi2var3_maskz_1 ( @@ -17272,11 +17272,11 @@ }) (define_expand "_vpermi2var3_maskz" - [(match_operand:VI2_AVX512VL 0 "register_operand" "=v") - (match_operand:VI2_AVX512VL 1 "register_operand" "v") - (match_operand: 2 "register_operand" "0") - (match_operand:VI2_AVX512VL 3 "nonimmediate_operand" "vm") - (match_operand: 4 "register_operand" "Yk")] + [(match_operand:VI2_AVX512VL 0 "register_operand") + (match_operand:VI2_AVX512VL 1 "register_operand") + (match_operand: 2 "register_operand") + (match_operand:VI2_AVX512VL 3 "nonimmediate_operand") + (match_operand: 4 "register_operand")] "TARGET_AVX512BW" { emit_insn (gen__vpermi2var3_maskz_1 ( @@ -17373,11 +17373,11 @@ (set_attr "mode" "")]) (define_expand "_vpermt2var3_maskz" - [(match_operand:VI48F 0 "register_operand" "=v") - (match_operand: 1 "register_operand" "v") - (match_operand:VI48F 2 "register_operand" "0") - (match_operand:VI48F 3 "nonimmediate_operand" "vm") - (match_operand: 4 "register_operand" "Yk")] + [(match_operand:VI48F 0 "register_operand") + (match_operand: 1 "register_operand") + (match_operand:VI48F 2 "register_operand") + (match_operand:VI48F 3 "nonimmediate_operand") + (match_operand: 4 "register_operand")] "TARGET_AVX512F" { emit_insn (gen__vpermt2var3_maskz_1 ( @@ -17387,11 +17387,11 @@ }) (define_expand "_vpermt2var3_maskz" - [(match_operand:VI1_AVX512VL 0 "register_operand" "=v") - (match_operand: 1 "register_operand" "v") - (match_operand:VI1_AVX512VL 2 "register_operand" "0") - (match_operand:VI1_AVX512VL 3 "nonimmediate_operand" "vm") - (match_operand: 4 "register_operand" "Yk")] + [(match_operand:VI1_AVX512VL 0 "register_operand") + (match_operand: 1 "register_operand") + (match_operand:VI1_AVX512VL 2 "register_operand") + (match_operand:VI1_AVX512VL 3 "nonimmediate_operand") + (match_operand: 4 "register_operand")] "TARGET_AVX512VBMI" { emit_insn (gen__vpermt2var3_maskz_1 ( @@ -17401,11 +17401,11 @@ }) (define_expand "_vpermt2var3_maskz" - [(match_operand:VI2_AVX512VL 0 "register_operand" "=v") - (match_operand: 1 "register_operand" "v") - (match_operand:VI2_AVX512VL 2 "register_operand" "0") - (match_operand:VI2_AVX512VL 3 "nonimmediate_operand" "vm") - (match_operand: 4 "register_operand" "Yk")] + [(match_operand:VI2_AVX512VL 0 "register_operand") + (match_operand: 1 "register_operand") + (match_operand:VI2_AVX512VL 2 "register_operand") + (match_operand:VI2_AVX512VL 3 "nonimmediate_operand") + (match_operand: 4 "register_operand")] "TARGET_AVX512BW" { emit_insn (gen__vpermt2var3_maskz_1 ( -- 2.30.2