From 234fa4cf7ecd16350c1095830d26f94b2bfd3eb9 Mon Sep 17 00:00:00 2001 From: Joel Hestness Date: Wed, 12 Sep 2012 21:41:37 -0500 Subject: [PATCH] Standard Switch: Drain the system before switching CPUs When switching from an atomic CPU to any of the timing CPUs, a drain is unnecessary since no events are scheduled in atomic mode. However, when trying to switch CPUs starting with a timing CPU, there may be events scheduled. This change ensures that all events are drained from the system by calling m5.drain before switching CPUs. --- configs/common/Simulation.py | 3 ++- src/python/m5/simulate.py | 1 - 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/common/Simulation.py b/configs/common/Simulation.py index 8e62bcbb6..967f39b75 100644 --- a/configs/common/Simulation.py +++ b/configs/common/Simulation.py @@ -453,6 +453,7 @@ def run(options, root, testsys, cpu_class): # manually. You DON'T need to resume after just switching # CPUs if you haven't changed anything on the system level. + m5.doDrain(testsys) m5.changeToTiming(testsys) m5.switchCpus(switch_cpu_list) m5.resume(testsys) @@ -469,7 +470,7 @@ def run(options, root, testsys, cpu_class): print "Switching CPUS @ tick %s" % (m5.curTick()) print "Simulation ends instruction count:%d" % \ (testsys.switch_cpus_1[0].max_insts_any_thread) - m5.drain(testsys) + m5.doDrain(testsys) m5.switchCpus(switch_cpu_list1) m5.resume(testsys) diff --git a/src/python/m5/simulate.py b/src/python/m5/simulate.py index 9cb647a6b..0f2a546c1 100644 --- a/src/python/m5/simulate.py +++ b/src/python/m5/simulate.py @@ -203,7 +203,6 @@ def changeToTiming(system): (type(system), objects.Root, objects.System) if system.getMemoryMode() != objects.params.timing: - doDrain(system) print "Changing memory mode to timing" for obj in system.descendants(): obj.changeTiming(objects.params.timing) -- 2.30.2